Mo M. Zhang

According to our database1, Mo M. Zhang authored at least 7 papers between 2006 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2016
27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

An algorithmic ADC with greater than rail-to-rail input range and near-Vt supply.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015


2010
Calibration of pipelined ADC gain and memory errors in an adaptively equalized receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Gain-Error Calibration of a Pipelined ADC in an Adaptively Equalized Baseband Receiver.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

2006
Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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