Mokhtar Nibouche

Orcid: 0000-0003-0150-8087

According to our database1, Mokhtar Nibouche authored at least 44 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Immersion and invariance based adaptive command filtered backstepping control design for a class of SISO uncertain nonlinear systems in strict-feedback form.
Trans. Inst. Meas. Control, January, 2024

2023
Tuning functions based adaptive backstepping control for uncertain strict-feedback nonlinear systems using barrier Lyapunov functions with full state constraints.
Eur. J. Control, March, 2023

2020
U-model enhanced control of non-minimum phase systems.
Int. J. Syst. Sci., 2020

2019
Feed-Forward Selection of Cerebellar Models for Calibration of Robot Sound Source Localization.
Proceedings of the Biomimetic and Biohybrid Systems - 8th International Conference, 2019

2018
Audio Localization for Robots Using Parallel Cerebellar Models.
IEEE Robotics Autom. Lett., 2018

2017
Self-adaptive Context Aware Audio Localization for Robots Using Parallel Cerebellar Models.
Proceedings of the Towards Autonomous Robotic Systems - 18th Annual Conference, 2017

2016
Speech denoising using discrete wavelet packet decomposition technique.
Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

Denoising speech by notch filter and wavelet thresholding in real time.
Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

2015
Complexity reduction in the H.264/AVC using highly adaptive fast mode decision based on macroblock motion activity.
J. Electronic Imaging, 2015

A bi-dimensional empirical mode decomposition based watermarking scheme.
Int. Arab J. Inf. Technol., 2015

2013
A Fast and Efficient Inter Mode Decision Algorithm for the H.264/AVC Video Coding Standard.
Proceedings of the SIGMAP and WINSYS 2013, 2013

2012
Porting a H264/AVC Adaptive in Loop Deblocking Filter to a TI DM6437EVM DSP.
Proceedings of the Image and Signal Processing - 5th International Conference, 2012

2009
Design innovation for real world applications, using evolutionary algorithms.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009

A Biologically Inspired Hardware Module for Embedded Auditory Signal Processing Applications.
Proceedings of the BIOSIGNALS 2009, 2009

2008
Evolutionary Electronics: A Novel Approach and the Effects of Geometry-related Parameters on Performance.
Proceedings of the 2008 International Conference on Genetic and Evolutionary Methods, 2008

Fitness Evaluation Expansion to Enhance GA'S Performance in Evolvable Hardware.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2007
Evolvable Hardware: A Problem of Generalization Which Works Best: Large Population Size and Small Number of Generations or visa versa?.
Proceedings of the Nature Inspired Cooperative Strategies for Optimization (NICSO 2007), 2007

Implementing Spiking Neural Networks for Real-Time Signal-Processing and Control Applications: A Model-Validated FPGA Approach.
IEEE Trans. Neural Networks, 2007

Steps Forward to Evolve Bio-inspired Embryonic Cell-Based Electronic Systems.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2007

Evolvable Embryonics: Promising Early Results to An Automatic Design of Self-Repair Hardware System.
Proceedings of the 2007 International Conference on Genetic and Evolutionary Methods, 2007

Towards evolving fault tolerant biologically inspired hardware using evolutionary algorithms.
Proceedings of the IEEE Congress on Evolutionary Computation, 2007

2006
A Hardware Based Implementation of a Tactile Sensory System For Neuromorphic Signal Processing Applications.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

A Biologically Inspired FPGA Based Implementation of a Tactile Sensory System for Object Recognition and Texture Discrimination.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor.
Proceedings of the Artificial Neural Networks: Formal Models and Their Applications, 2005

Design and FPGA Implementation of an Embedded Real-Time Biologically Plausible Spiking Neural Network Processor.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
New iterative algorithms for modular multiplication.
Signal Process., 2004

Fast architectures for FPGA-based implementation of RSA encryption algorithm.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003
Design and implementation of a wavelet based system.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

High speed FPGA implementation of RSA encryption algorithm.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

On the viability of the smoothed pseudo Wigner-Ville distribution for time-frequency analysis of Arabic speech signal.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002
On designing digit multipliers.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Design and implementation of a wavelet block for signal processing applications.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
Rapid prototyping of orthonormal wavelet transforms on FPGAs.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

New architectures for serial-serial multiplication.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

An FPGA-based wavelet transforms coprocessor.
Proceedings of the 2001 International Conference on Image Processing, 2001

Rapid prototyping of biorthogonal discrete wavelet transforms on FPGAs.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

New iterative algorithms and architectures of modular multiplication for cryptography.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

A framework for a wavelet-based high level environment.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Bit-level architectures for Montgomery's multiplication.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

FPGA-Based Discrete Wavelet Transforms System.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
A new pipelined digit serial-parallel multiplier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A low latency bi-directional serial-parallel multiplier architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Application of Fractals to the Detection and Classification of Shoeprints.
Proceedings of the 2000 International Conference on Image Processing, 2000

Design and FPGA implementation of orthonormal discrete wavelet transforms.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000


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