Monica Lobetti Bodoni

According to our database1, Monica Lobetti Bodoni authored at least 10 papers between 1996 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2003
Guest Editors' Introduction: Board Test.
IEEE Design & Test of Computers, 2003

Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures.
IEEE Communications Magazine, 2003

2002
Panel: "Board Test and ITC: What Does the Future Hold?".
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
Online and Offline BIST in IP-Core Design.
IEEE Design & Test of Computers, 2001

2000
A programmable BIST architecture for clusters of multiple-port SRAMs.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

A Family of Self-Repair SRAM Cores.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1999
An on-line BISTed SRAM IP core.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1996
Scan insertion criteria for low design impact.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

A Parametric Design of a Built-in Self-Test FIFO Embedded Memory.
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996


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