Alfredo Benso

According to our database1, Alfredo Benso authored at least 93 papers between 1996 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Beyond Homology Transfer: Deep Learning for Automated Annotation of Proteins.
J. Grid Comput., 2019

'One DB to rule them all' - the RING: a Regulatory INteraction Graph combining TFs, genes/proteins, SNPs, diseases and drugs.
Database, 2019

2018
Modeling biological complexity using Biology System Description Language (BiSDL).
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018

2017
Using multi-level Petri nets models to simulate microbiota resistance to antibiotics.
Proceedings of the 2017 IEEE International Conference on Bioinformatics and Biomedicine, 2017

2016
CyTRANSFINDER: a Cytoscape 3.3 plugin for three-component (TF, gene, miRNA) signal transduction pathway construction.
BMC Bioinformatics, 2016

Using Nets-Within-Nets for Modeling Differentiating Cells in the Epigenetic Landscape.
Proceedings of the Bioinformatics and Biomedical Engineering, 2016

A Structure based Approach for Accurate Prediction of Protein Interactions Networks.
Proceedings of the 9th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2016), 2016

Implementing a Cloud-Based Service Supporting Biological Network Simulations.
Proceedings of the 30th IEEE International Conference on Advanced Information Networking and Applications, 2016

2015
A 3D Voxel Neighborhood Classification Approach within a Multiparametric MRI Classifier for Prostate Cancer Detection.
Proceedings of the Bioinformatics and Biomedical Engineering, 2015

Evaluating Scalability of a Cloud Based Platform for Biological Networks Analysis.
Proceedings of the Ninth International Conference on Complex, 2015

2014
Using Boolean networks to model post-transcriptional regulation in gene regulatory networks.
J. Comput. Science, 2014

Alice in "Bio-Land": Engineering Challenges in the World of Life Sciences.
IT Professional, 2014

FunMod: A Cytoscape Plugin for Identifying Functional Modules in Undirected Protein-Protein Networks.
Genom. Proteom. Bioinform., 2014

Augmented Reading: The Present and Future of Electronic Scientific Publications.
IEEE Computer, 2014

A Prostate Cancer Computer Aided Diagnosis Software including Malignancy Tumor Probabilistic Classification.
Proceedings of the BIOIMAGING 2014, 2014

A Computational Pipeline to Identify New Potential Regulatory Motifs in Melanoma Progression.
Proceedings of the Biomedical Engineering Systems and Technologies, 2014

A Computational Study to Identify TP53 and SREBF2 as Regulation Mediators of miR-214 in Melanoma Progression.
Proceedings of the BIOINFORMATICS 2014, 2014

Identifying Sub-Network Functional Modules in Protein Undirected Networks.
Proceedings of the BIOINFORMATICS 2014, 2014

2013
A systematic analysis of a mi-RNA inter-pathway regulatory motif.
J. Clinical Bioinformatics, 2013

Accounting for Post-Transcriptional Regulation in Boolean Networks Based Regulatory Models.
Proceedings of the International Work-Conference on Bioinformatics and Biomedical Engineering, 2013

A New miRNA Motif Protects Pathways Expression in Gene Regulatory Networks.
Proceedings of the International Work-Conference on Bioinformatics and Biomedical Engineering, 2013

2012
Statistical Reliability Estimation of Microprocessor-Based Systems.
IEEE Trans. Computers, 2012

Combining homolog and motif similarity data with Gene Ontology relationships for protein function prediction.
Proceedings of the 2012 IEEE International Conference on Bioinformatics and Biomedicine, 2012

2011
A cDNA Microarray Gene Expression Data Classifier for Clinical Diagnostics Based on Graph Theory.
IEEE/ACM Trans. Comput. Biology Bioinform., 2011

Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications.
IEEE Trans. Computers, 2011

Building gene expression profile classifiers with a simple and efficient rejection option in R.
BMC Bioinformatics, 2011

2009
Are IEEE-1500-Compliant Cores Really Compliant to the Standard?.
IEEE Design & Test of Computers, 2009

2008
IEEE Standard 1500 Compliance Verification for Embedded Cores.
IEEE Trans. VLSI Syst., 2008

March Test Generation Revealed.
IEEE Trans. Computers, 2008

A graph-based representation of Gene Expression profiles in DNA microarrays.
Proceedings of the 2008 IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology, 2008

Differential gene expression graphs: A data structure for classification in DNA microarrays.
Proceedings of the 8th IEEE International Conference on Bioinformatics and Bioengineering, 2008

2007
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Automating the IEEE std.1500 compliance verification for embedded cores.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007

A Functional Verification Based Fault Injection Environment.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006
Single-Event Upset Analysis and Protection in High Speed Circuits.
Proceedings of the 11th European Test Symposium, 2006

A 22n March Test for Realistic Static Linked Faults in SRAMs.
Proceedings of the 11th European Test Symposium, 2006

Automatic March Tests Generation for Multi-Port SRAMs.
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Automatic march tests generations for static linked faults in SRAMs.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
System-level functional testing from UML specifications in end-of-production industrial environments.
STTT, 2005

Agent-based test and repair of distributed systems.
J. Embedded Computing, 2005

A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems.
Electron. Notes Theor. Comput. Sci., 2005

Reconfigurable systems self-healing using mobile hardware agents.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

March AB, March AB1: new March tests for unlinked dynamic memory faults.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Automatic March tests generation for static and dynamic faults in SRAMs.
Proceedings of the 10th European Test Symposium, ETS 2005, Tallinn, 2005

2004
Test Technology TC Newsletter.
IEEE Design & Test of Computers, 2004

Towards Microagent based DBIST/DBISR.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003
A Hierarchical Infrastructure for SoC Test Management.
IEEE Design & Test of Computers, 2003

Online Self-Repair of FIR Filters.
IEEE Design & Test of Computers, 2003

Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures.
IEEE Communications Magazine, 2003

Agent Based DBIST/DBISR And Its Web/Wireless Management.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Data Critically Estimation In Software Applications.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Self-Testing and Self-Healing via Mobile Agents.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

FAUST: FAUlt-injection Script-based Tool.
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

A Watchdog Processor to Detect Data and Control Flow Errors.
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

2002
An on-line BIST RAM architecture with self-repair capabilities.
IEEE Trans. Reliability, 2002

DFT and BIST of a Multichip Module for High-Energy Physics Experiments.
IEEE Design & Test of Computers, 2002

Itelligent Agents and BIST/BISR - Working Together in Distributed Systems.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Static Analysis of SEU Effects on Software Applications.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Efficient Design of System Test: A Layered Architecture.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

An Optimal Algorithm for the Automatic Generation of March Tests.
Proceedings of the 2002 Design, 2002

Beyond UML to an End-of-Line Functional Test Engine.
Proceedings of the 2002 Design, 2002

Specification and Design of a New Memory Fault Simulator.
Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

2001
A Self-Repairing Execution Unit for Microprogrammed Processors.
IEEE Micro, 2001

Online and Offline BIST in IP-Core Design.
IEEE Design & Test of Computers, 2001

Towards a unified test process: from UML to end-of-line functional test.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Validation of a Software Dependability Tool via Fault Injection Experiments.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

SEU effect analysis in an open-source router via a distributed fault injection environment.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Control-Flow Checking via Regular Expressions.
Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

Memory Read Faults: Taxonomy and Automatic Test Generation.
Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

2000
A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures.
J. Electronic Testing, 2000

A software development kit for dependable applications in embedded systems.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

A programmable BIST architecture for clusters of multiple-port SRAMs.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

HD/sup 2/BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

A Family of Self-Repair SRAM Cores.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

A C/C++ Source-to-Source Compiler for Dependable Applications.
Proceedings of the 2000 International Conference on Dependable Systems and Networks (DSN 2000) (formerly FTCS-30 and DCCA-8), 2000

Self-Repairing in a Micro-Programmed Processor for Dependable Applications.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

'BOND': An Interposition Agents Based Fault Injector for Windows NT.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999
Fault Injection for Embedded Microprocessor-based Systems.
J. UCS, 1999

Testing embedded memories in telecommunication systems.
IEEE Communications Magazine, 1999

FlexFi: A Flexible Fault Injection Environment for Microprocessor-Based Systems.
Proceedings of the Computer Safety, 1999

An on-line BISTed SRAM IP core.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Testing an MCM for high-energy physics experiments: a case study.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998
EXFI: a low-cost fault injection system for embedded microprocessor-based boards.
ACM Trans. Design Autom. Electr. Syst., 1998

A fault injection environment for microprocessor-based boards.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

An Integrated HW and SW Fault Injection Environment for Real-Time Systems.
Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998

1997
Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments.
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs.
Proceedings of the European Design and Test Conference, 1997

1996
Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment.
Proceedings of the conference on European design automation, 1996


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