Naina Gupta

According to our database, Naina Gupta authored at least 17 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

EFFLUX-F2: A High Performance Hardware Security Evaluation Board.

Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya

IACR Cryptol. ePrint Arch., 2024

2023

SoCFaSe: in quest for fast and secure SoC architectures

Naina Gupta

PhD thesis, 2023

Lightweight Hardware Accelerator for Post-Quantum Digital Signature CRYSTALS-Dilithium.

Naina Gupta, Arpan Jati, Anupam Chattopadhyay, Gautam Jha

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

AI Attacks AI: Recovering Neural Network architecture from NVDLA using AI-assisted Side Channel Attack.

Naina Gupta, Arpan Jati, Anupam Chattopadhyay

IACR Cryptol. ePrint Arch., 2023

BAKSHEESH: Similar Yet Different From GIFT.

Anubhab Baksi, Jakub Breier, Anupam Chattopadhyay, Tomas Gerlich, Sylvain Guilley, Naina Gupta, Kai Hu, Takanori Isobe, Arpan Jati, Petr Jedlicka, Hyunjun Kim, Fukang Liu, Zdenek Martinasek, Kosei Sakamoto, Hwajeong Seo, Rentaro Shiba, Ritu Ranjan Shrivastwa

IACR Cryptol. ePrint Arch., 2023

CRYSTALS-Dilithium on RISC-V Processor: Lightweight Secure Boot Using Post-Quantum Digital Signature.

Naina Gupta, Arpan Jati, Anupam Chattopadhyay

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2021

PQC Acceleration Using GPUs: FrodoKEM, NewHope, and Kyber.

Naina Gupta, Arpan Jati, Amit Kumar Chauhan, Anupam Chattopadhyay

IEEE Trans. Parallel Distributed Syst., 2021

MemEnc: A Lightweight, Low-Power, and Transparent Memory Encryption Engine for IoT.

Naina Gupta, Arpan Jati, Anupam Chattopadhyay

IEEE Internet Things J., 2021

A Configurable Crystals-Kyber Hardware Implementation with Side-Channel Protection.

Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya

IACR Cryptol. ePrint Arch., 2021

In Quest for Fast and Secure SoC.

Naina Gupta, Anupam Chattopadhyay

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

2020

Threshold Implementations of <tt>GIFT</tt>: A Trade-Off Analysis.

Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya, Donghoon Chang

IEEE Trans. Inf. Forensics Secur., 2020

Towards Designing a Secure RISC-V System-on-Chip: ITUS.

Vinay B. Y. Kumar, Suman Deb, Naina Gupta, Shivam Bhasin, Jawad Haj-Yahya, Anupam Chattopadhyay, Avi Mendelson

J. Hardw. Syst. Secur., 2020

Post-Quantum Secure Boot.

Vinay B. Y. Kumar, Naina Gupta, Anupam Chattopadhyay, Michael Kasper, Christoph Krauß, Ruben Niederhagen

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

SPQCop: Side-channel protected Post-Quantum Cryptoprocessor.

Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya

IACR Cryptol. ePrint Arch., 2019

XMSS and Embedded Systems.

Wen Wang, Bernhard Jungk, Julian Wälde, Shuwen Deng, Naina Gupta, Jakub Szefer, Ruben Niederhagen

Proceedings of the Selected Areas in Cryptography - SAC 2019, 2019

2018

XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V.

Wen Wang, Bernhard Jungk, Julian Wälde, Shuwen Deng, Naina Gupta, Jakub Szefer, Ruben Niederhagen

IACR Cryptol. ePrint Arch., 2018

2016

Exploiting the Leakage: Analysis of Some Authenticated Encryption Schemes.

Donghoon Chang, Amit Kumar Chauhan, Naina Gupta, Arpan Jati, Somitra Kumar Sanadhya

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2016