Costin Anghel

According to our database1, Costin Anghel authored at least 19 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Related references for extended TED submission (uDRAM and uSRAM reference papers).
Dataset, December, 2018

2017
Tunnel FET based ultra-low-leakage compact 2T1C SRAM.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps.
Proceedings of the 22nd IEEE European Test Symposium, 2017

1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Tunnel FET based refresh-free-DRAM.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
TFET NDR skewed inverter based sensing method.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Ultra-compact SRAM design using TFETs for low power low voltage applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 2-Gb/s 60 GHz transmission-gate based 130nm CMOS on-off keying modulator.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes.
Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
RRAM-based FPGA for "Normally Off, Instantly On" applications.
J. Parallel Distributed Comput., 2014

Bulk and FDSOI SRAM resiliency to radiation effects.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2012
Bipolar ReRAM Based non-volatile flip-flops for low-power architectures.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

A 32nm tunnel FET SRAM for ultra low leakage.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2006
A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006


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