Norman J. Rohrer

According to our database, Norman J. Rohrer authored at least 5 papers between 1998 and 2007.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2007

SE6 Secure Digital Systems.

David Money Harris, Norman J. Rohrer

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

High-performance CMOS variability in the 65-nm regime and beyond.

Kerry Bernstein, David J. Frank, Anne E. Gattiker, Wilfried Haensch, Brian L. Ji, Sani R. Nassif, Edward J. Nowak, Dale J. Pearson, Norman J. Rohrer

IBM J. Res. Dev., 2006

A 64B CPU Pair: Dual- and Single-Processor Chips.

Erwin B. Cohen, Norman J. Rohrer, Peter A. Sandon, Miles G. Canada, Cédric Lichtenau, Mathew I. Ringler, Paul Kartschoke, Robert Floyd, Jan Heaslip, M. Ross, Thomas Pflueger, Rolf B. Hilgendorf, Pete McCormick, Gerard Salem, J. Connor, Stephen F. Geissler, Dana Thygesen

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features.

Norman J. Rohrer, Cédric Lichtenau, Peter A. Sandon, Paul Kartschoke, Erwin B. Cohen, Miles G. Canada, Thomas Pflüger, Mathew I. Ringler, Rolf B. Hilgendorf, Stephen F. Geissler, Jeffrey S. Zimmerman

IEEE J. Solid State Circuits, 2005

1998

A 480-MHz RISC microprocessor in a 0.12-μm L_eff CMOS technology with copper interconnects.

Chekib Akrout, John Bialas, Miles G. Canada, Duane Cawthron, James Corr, Bijan Davari, Robert Floyd, Stephen F. Geissler, Ronald Goldblatt, Robert Houle, Paul Kartschoke, Diane Kramer, Pete McCormick, Norman J. Rohrer, Gerard Salem, Ronald Schulz, Lisa Su, Linda Whitney

IEEE J. Solid State Circuits, 1998