Pavel Poliakov

According to our database1, Pavel Poliakov authored at least 4 papers between 2009 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2012
Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories.
Microelectron. Reliab., 2012

2011
Cross-cell interference variability aware model of fully planar NAND Flash memory including line edge roughness.
Microelectron. Reliab., 2011

2010
Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

2009
Variability aware modeling of SoCs: From device variations to manufactured system yield.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009


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