Nadine Collaert
According to our database1,
Nadine Collaert
authored at least 32 papers
between 2007 and 2023.
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Bibliography
2023
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Interpretation and modelling of dynamic-RON kinetics in GaN-on-Si HEMTs for mm-wave applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
III-V HBTs on 300 mm Si substrates using merged nano-ridges and its application in the study of impact of defects on DC and RF performance.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
Impact of channel thickness scaling on the performance of GaN-on-Si RF HEMTs on highly C-doped GaN buffer.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022
2021
A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
CMOS compatible GaN-on-Si HEMT technology for RF applications: analysis of substrate losses and non-linearities.
Proceedings of the International Conference on IC Design and Technology, 2021
Proceedings of the IEEE Globecom 2021 Workshops, Madrid, Spain, December 7-11, 2021, 2021
Impact of III-N buffer layers on RF losses and harmonic distortion of GaN-on-Si Substrates.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
2020
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2019
Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019
Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
2018
Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018
Proceedings of the 48th European Solid-State Device Research Conference, 2018
2016
Proceedings of the International Conference on IC Design and Technology, 2016
Non-uniform strain in lattice-mismatched heterostructure tunnel field-effect transistors.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
FinFET stressor efficiency on alternative wafer and channel orientations for the 14 nm node and below.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Microelectron. Reliab., 2014
Proceedings of the 44th European Solid State Device Research Conference, 2014
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies.
Proceedings of the 44th European Solid State Device Research Conference, 2014
2012
High-energy neutrons effect on strained and non-strained SOI MuGFETs and planar MOSFETs.
Microelectron. Reliab., 2012
2011
Micro-sized syringes for single-cell fluidic access integrated on a micro-electrode array CMOS chip.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
2010
IEEE Trans. Circuits Syst. II Express Briefs, 2010
2009
Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
2008
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007