Bart De Wachter

According to our database1, Bart De Wachter authored at least 8 papers between 2010 and 2017.

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Timeline

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Bibliography

2017
A fully automatic test system for characterizing large-array fine-pitch micro-bump probe cards.
Proceedings of the International Test Conference in Asia, 2017

2015
Automated testing of bare die-to-die stacks.
Proceedings of the 2015 IEEE International Test Conference, 2015

2014
Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface.
Proceedings of the 2014 International Test Conference, 2014

Vesuvius-3D: A 3D-DfT demonstrator.
Proceedings of the 2014 International Test Conference, 2014

2012
3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.
IEEE J. Solid State Circuits, 2011

2010
Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2010



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