Paul Zuber

According to our database, Paul Zuber authored at least 17 papers between 2002 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes.

Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

Analysis of FinFET technology on memories.

Esteve Amat, A. Asenov, Ramon Canal, Binjie Cheng, J.-Ll. Cruz, Zoran Jaksic, Miguel Miranda, Antonio Rubio, Paul Zuber

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011

TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies.

Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera

Proceedings of the 2nd European Future Technologies Conference and Exhibition, 2011

New reliability mechanisms in memory design for sub-22nm technologies.

Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Variability aware modeling for yield enhancement of SRAM and logic.

Miguel Miranda, Paul Zuber, Petr Dobrovolný, Philippe Roussel

Proceedings of the Design, Automation and Test in Europe, 2011

Variability Aware Sub-Wavelength Lithography Characterization for Robust SRAM Design.

Petr Dobrovolný, Miguel Miranda, Paul Zuber

Proceedings of the ARCS 2011, 2011

2010

Optimal wire ordering and spacing in low power semiconductor design.

Peter Gritzmann, Michael Ritter, Paul Zuber

Math. Program., 2010

Statistical SRAM analysis for yield enhancement.

Paul Zuber, Miguel Miranda, Petr Dobrovolný, Koen van der Zanden, Jong-Hoon Jung

Proceedings of the Design, Automation and Test in Europe, 2010

A holistic approach for statistical SRAM analysis.

Paul Zuber, Petr Dobrovolný, Miguel Miranda

Proceedings of the 47th Design Automation Conference, 2010

2009

Wire Topology Optimization for Low Power CMOS.

Paul Zuber, Othman Bahlous, Thomas Ilnseher, Michael Ritter, Walter Stechele

IEEE Trans. Very Large Scale Integr. Syst., 2009

Exponent Monte Carlo for Quick Statistical Circuit Simulation.

Paul Zuber, Vladimir Matvejev, Philippe Roussel, Petr Dobrovolný, Miguel Miranda

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

Variability aware modeling of SoCs: From device variations to manufactured system yield.

Miguel Miranda, Bart Dierickx, Paul Zuber, Petr Dobrovolný, F. Kutscherauer, Philippe Roussel, Pavel Poliakov

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2005

The Optimal Wire Order for Low Power CMOS.

Paul Zuber, Peter Gritzmann, Michael Ritter, Walter Stechele

Proceedings of the Integrated Circuit and System Design, 2005

Optimization Potential of CMOS Power by Wire Spacing.

Paul Zuber, Florian Helmut Müller, Walter Stechele

Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization.

Paul Zuber, Armin Windschiegl, Raúl Medina Beltrán de Otálora, Walter Stechele, Andreas Herkersdorf

Proceedings of the 2005 Design, 2005

2002

Exploiting Metal Layer Characteristics for Low-Power Routing.

Armin Windschiegl, Paul Zuber, Walter Stechele

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

A wire load model considering metal layer properties.

Armin Windschiegl, Torsten Mahnke, Michael Eiermann, Walter Stechele, Paul Zuber

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002