Peide D. Ye
Affiliations:- Purdue University, West Lafayette, USA
  According to our database1,
  Peide D. Ye
  authored at least 21 papers
  between 2015 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
  IEEE Fellow 2013, "For contributions to compound semiconductor MOSFET materials and devices".
Timeline
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Bibliography
  2025
Asymmetric Reliability and Universality of Defect Formation in Oxide-Gated Ultra-Thin In2O3Vertical FETs for Monolithic 3-D Integration.
    
  
    Proceedings of the IEEE International Reliability Physics Symposium, 2025
    
  
    Proceedings of the IEEE International Memory Workshop, 2025
    
  
  2024
Enhancement of In2O3 Field-Effect Mobility Up To 152 cm<sup>2</sup>.V<sup>-1</sup>·s<sup>-1</sup>Using HZO-Based Higher-k Linear Dielectric.
    
  
    Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
    
  
Positive to Negative Schottky Barrier Transition in Metal/Oxide Semiconductor Contacts by Tuning Indium Concentration in IGZO.
    
  
    Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
    
  
  2023
Ultrathin Atomic-Layer-Deposited In2O3 Radio-Frequency Transistors with Record High fT of 36 GHz and BEOL Compatibility.
    
  
    Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
    
  
First Demonstration of BEOL-Compatible Atomic-Layer-Deposited InGaZnO TFTs with 1.5 nm Channel Thickness and 60 nm Channel Length Achieving ON/OFF Ratio Exceeding 10<sup>11</sup>, SS of 68 mV/dec, Normal-off Operation and High Positive Gate Bias Stability.
    
  
    Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
    
  
    Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
    
  
FeFET-Based Synaptic Cross-Bar Arrays for Deep Neural Networks: Impact of Ferroelectric Thickness on Device-Circuit Non-Idealities and System Accuracy.
    
  
    Proceedings of the Device Research Conference, 2023
    
  
  2022
Determination of Domain Wall Velocity and Nucleation Time by Switching Dynamics Studies of Ferroelectric Hafnium Zirconium Oxide.
    
  
    Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
    
  
Ultra-Fast Operation of BEOL-Compatible Atomic-Layer-Deposited In2O3 Fe-FETs: Achieving Memory Performance Enhancement with Memory Window of 2.5 V and High Endurance > 10<sup>9</sup> Cycles without VT Drift Penalty.
    
  
    Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
    
  
    Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
    
  
Record RF Performance of Ultra-thin Indium Oxide Transistors with Buried-gate Structure.
    
  
    Proceedings of the Device Research Conference, 2022
    
  
  2019
    Proceedings of the Device Research Conference, 2019
    
  
  2018
    Proceedings of the IEEE International Reliability Physics Symposium, 2018
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
High-Performance Few-Layer Tellurium CMOS Devices Enabled by Atomic Layer Deposited Dielectric Doping Technique.
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
The Impact of Substrates on the Performance of Top-Gate p-Ga203 Field-Effect Transistors: Record High Drain Current of 980 mA/mm on Diamond.
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
Time Response of Polarization Switching in Ge Hafnium Zirconium Oxide Nanowire Ferroelectric Field-effect Transistors.
    
  
    Proceedings of the 76th Device Research Conference, 2018
    
  
  2015
    Proceedings of the IEEE International Reliability Physics Symposium, 2015