Peng Liu

According to our database1, Peng Liu authored at least 13 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A Secure DFT Architecture Protecting Crypto Chips Against Scan-Based Attacks.
IEEE Access, 2019

2018
An efficient controlled LFSR hybrid BIST scheme.
IEICE Electronic Express, 2018

Defect Analysis and Parallel March Test Algorithm for 3D Hybrid CMOS-Memristor Memory.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017
A Novel Linguistic Steganography Based on Synonym Run-Length Encoding.
IEICE Trans. Inf. Syst., 2017

A direct AC-DC converter integrated with SSHI circuit for piezoelectric energy harvesting.
IEICE Electronic Express, 2017

A novel test data compression approach based on bit reversion.
IEICE Electronic Express, 2017

Reliability evaluation of logic circuits based on transient faults propagation metrics.
IEICE Electronic Express, 2017

2016
A parallel-SSHI rectifier for ultra-low-voltage piezoelectric vibration energy harvesting.
IEICE Electronic Express, 2016

2015
Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm.
IEICE Electronic Express, 2015

2013
Low power logic BIST with high test effectiveness.
IEICE Electronic Express, 2013

2012
A scan disabling-based BAST scheme for test cost and test power reduction.
IEICE Electronic Express, 2012

Switching activity reduction for scan-based BIST using weighted scan input data.
IEICE Electronic Express, 2012

2011
A scan disabling-based BAST scheme for test cost reduction.
IEICE Electronic Express, 2011


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