Pierre Michaud

According to our database1, Pierre Michaud
  • authored at least 28 papers between 1996 and 2016.
  • has a "Dijkstra number"2 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepage:

On csauthors.net:

Bibliography

2016
Some Mathematical Facts About Optimal Cache Replacement.
TACO, 2016

A simple proof of optimality for the MIN cache replacement policy.
Inf. Process. Lett., 2016

Best-offset hardware prefetching.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015
Revisiting Clustered Microarchitecture for Future Superscalar Cores: A Case for Wide Issue Clusters.
TACO, 2015

BADCO: Behavioral Application-Dependent Superscalar Core Models.
International Journal of Parallel Programming, 2015

Long term parking (LTP): criticality-aware resource allocation in OOO processors.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Revisiting symbiotic job scheduling.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Cost-effective speculative scheduling in high performance processors.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Multiprogram Throughput Metrics: A Systematic Approach.
TACO, 2014

2013
Demystifying multicore throughput metrics.
Computer Architecture Letters, 2013

Selecting benchmark combinations for the evaluation of multicore throughput.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

2012
BADCO: Behavioral Application-Dependent Superscalar Core model.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2011
Replacement policies for shared caches on symmetric multicores: a programmer-centric point of view.
Proceedings of the High Performance Embedded Architectures and Compilers, 2011

2010
Proposition for a sequential accelerator in future general-purpose manycore processors and the problem of migration-induced cache misses.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
Online compression of cache-filtered address traces.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

2007
A study of thread migration in temperature-constrained multicores.
TACO, 2007

2006
A case for (partially) TAgged GEometric history length branch prediction.
J. Instruction-Level Parallelism, 2006

2005
Performance implications of single thread migration on a chip multi-core.
SIGARCH Computer Architecture News, 2005

A PPM-like, Tag-based Predictor.
J. Instruction-Level Parallelism, 2005

2004
Exploiting the Cache Capacity of a Single-Chip Multi-Core Processor with Execution Migration.
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004

2003
A statistical model of skewed-associativity.
Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software, 2003

2002
A Learning Grid for the multichallenge school ECP.
Proceedings of the 1st LEGE-WG International Workshop on Educational Models for GRID Based Services, 2002

2001
An Exploration of Instruction Fetch Requirement in Out-of-Order Superscalar Processors.
International Journal of Parallel Programming, 2001

Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors.
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

1999
Exploring Instruction-Fetch Bandwidth Requirement in Wide-Issue Superscalar Processors.
Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999

1997
Clustering techniques.
Future Generation Comp. Syst., 1997

Trading Conflict and Capacity Aliasing in Conditional Branch Predictors.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

1996
Multiple-Block Ahead Branch Predictors.
Proceedings of the ASPLOS-VII Proceedings, 1996


  Loading...