Arthur Perais

According to our database, Arthur Perais authored at least 23 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Toward Practical 128-Bit General Purpose Microarchitectures.

Chandana S. Deshpande, Arthur Perais, Frédéric Pétrot

IEEE Comput. Archit. Lett., 2023

Branch Target Buffer Organizations.

Arthur Perais, Rami Sheikh

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Rebasing Microarchitectural Research with Industry Traces.

Josué Feliu, Arthur Perais, Daniel A. Jiménez, Alberto Ros

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

Exploring Instruction Fusion Opportunities in General Purpose Processors.

Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Free atomics: hardware atomic operations without fences.

Ashkan Asgharzadeh, Juan M. Cebrian, Arthur Perais, Stefanos Kaxiras, Alberto Ros

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021

A Case for Speculative Strength Reduction.

Arthur Perais

IEEE Comput. Archit. Lett., 2021

Leveraging Targeted Value Prediction to Unlock New Hardware Strength Reduction Potential.

Arthur Perais

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

2020

Take A Way: Exploring the Security Implications of AMD's Cache Way Predictors.

Moritz Lipp, Vedad Hadzic, Michael Schwarz, Arthur Perais, Clémentine Maurice, Daniel Gruss

Proceedings of the ASIA CCS '20: The 15th ACM Asia Conference on Computer and Communications Security, 2020

2019

Elastic Instruction Fetching.

Arthur Perais, Rami Sheikh, Luke Yen, Michael McIlvaine, Robert D. Clancy

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2018

SPF: Selective Pipeline Flush.

Vignyan Reddy Kothinti Naresh, Rami Sheikh, Arthur Perais, Harold W. Cain

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

Cost effective speculation with the omnipredictor.

Arthur Perais, André Seznec

Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017

On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE.

Fernando A. Endo, Arthur Perais, André Seznec

ACM Trans. Archit. Code Optim., 2017

Storage-Free Memory Dependency Prediction.

Arthur Perais, André Seznec

IEEE Comput. Archit. Lett., 2017

2016

EOLE: Combining Static and Dynamic Scheduling Through Value Prediction to Reduce Complexity and Increase Performance.

Arthur Perais, André Seznec

ACM Trans. Comput. Syst., 2016

Register sharing for equality prediction.

Arthur Perais, Fernando A. Endo, André Seznec

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Cost effective physical register sharing.

Arthur Perais, André Seznec

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

Increasing the performance of superscalar processors through value prediction. (La prédiction de valeurs comme moyen d'augmenter la performance des processeurs superscalaires).

Arthur Perais

PhD thesis, 2015

EOLE: Toward a Practical Implementation of Value Prediction.

Arthur Perais, André Seznec

IEEE Micro, 2015

Long term parking (LTP): criticality-aware resource allocation in OOO processors.

Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, André Seznec, Pierre Michaud

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Cost-effective speculative scheduling in high performance processors.

Arthur Perais, André Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

BeBoP: A cost effective predictor infrastructure for superscalar value prediction.

Arthur Perais, André Seznec

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

EOLE: Paving the way for an effective implementation of value prediction.

Arthur Perais, André Seznec

Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Practical data value speculation for future high-end processors.

Arthur Perais, André Seznec

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014