Wayne D. Dettloff

According to our database1, Wayne D. Dettloff authored at least 9 papers between 1989 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits, 2014

2013
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques.
IEEE J. Solid State Circuits, 2011

2010
A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

1991
VLSI Fuzzy Chip and Inference Accelerator Board Systems.
Proceedings of the 21st International Symposium on Multiple-Valued Logic, 1991

BioSCAN: A VLSI-Based System for Biosequence Analysis.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1989
The Omnitest System: A No-Generate, No-Compile, Interactive Test Methodology.
Proceedings of the Proceedings International Test Conference 1989, 1989

A fuzzy logic controller with reconfigurable, cascadable architecture.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989


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