Renjian Pan

Orcid: 0000-0003-4283-7389

According to our database1, Renjian Pan authored at least 10 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Unsupervised Two-Stage Root-Cause Analysis With Transfer Learning for Integrated Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

2022
Unsupervised Two-Stage Root-Cause Analysis for Integrated Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Semi-Supervised Root-Cause Analysis with Co-Training for Integrated Systems.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022

2021
Applying Machine Learning to Testing and Diagnosis of Integrated Systems.
PhD thesis, 2021

Black-Box Test-Cost Reduction Based on Bayesian Network Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Unsupervised Root-Cause Analysis with Transfer Learning for Integrated Systems.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

2020
Analog/RF Post-silicon Tuning via Bayesian Optimization.
ACM Trans. Design Autom. Electr. Syst., 2020

Fine-grained Adaptive Testing Based on Quality Prediction.
ACM Trans. Design Autom. Electr. Syst., 2020

Unsupervised Root-Cause Analysis for Integrated Systems.
Proceedings of the IEEE International Test Conference, 2020

2019
Black-Box Test-Coverage Analysis and Test-Cost Reduction Based on a Bayesian Network Model.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019


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