Fangming Ye

According to our database1, Fangming Ye authored at least 25 papers between 2012 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Board-Level Functional Fault Identification Using Streaming Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020
Fine-grained Adaptive Testing Based on Quality Prediction.
ACM Trans. Design Autom. Electr. Syst., 2020

2016
Adaptive Board-Level Functional Fault Diagnosis Using Incremental Decision Trees.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

On-Chip Droop-Induced Circuit Delay Prediction Based on Support-Vector Machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Efficient Board-Level Functional Fault Diagnosis With Missing Syndromes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2015
Aging- and Variation-Aware Delay Monitoring Using Representative Critical Path Selection.
ACM Trans. Design Autom. Electr. Syst., 2015

Information-Theoretic Syndrome Evaluation, Statistical Root-Cause Analysis, and Correlation-Based Feature Selection for Guiding Board-Level Fault Diagnosis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Re-using BIST for circuit aging monitoring.
Proceedings of the 20th IEEE European Test Symposium, 2015

Self-learning and adaptive board-level functional fault diagnosis.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Knowledge-Driven Board-Level Functional Fault Diagnosis.
PhD thesis, 2014

Board-Level Functional Fault Diagnosis Using Multikernel Support Vector Machines and Incremental Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Test and Design-for-Testability Solutions for 3D Integrated Circuits.
IPSJ Trans. Syst. LSI Des. Methodol., 2014

Information-Theoretic Framework for Evaluating and Guiding Board-Level Functional-Fault Diagnosis.
IEEE Des. Test, 2014

On-chip voltage-droop prediction using support-vector machines.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

Knowledge discovery and knowledge transfer in board-level functional fault diagnosis.
Proceedings of the 2014 International Test Conference, 2014

Chip Health Monitoring Using Machine Learning.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Adaptive Mitigation of Parameter Variations.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Board-Level Functional Fault Diagnosis Using Artificial Neural Networks, Support-Vector Machines, and Weighted-Majority Voting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Representative critical-path selection for aging-induced delay monitoring.
Proceedings of the 2013 IEEE International Test Conference, 2013

Information-theoretic syndrome and root-cause analysis for guiding board-level fault diagnosis.
Proceedings of the 18th IEEE European Test Symposium, 2013

On effective and efficient in-field TSV repair for stacked 3D ICs.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Handling Missing Syndromes in Board-Level Functional-Fault Diagnosis.
Proceedings of the 22nd Asian Test Symposium, 2013

2012
TSV open defects in 3D integrated circuits: characterization, test, and optimal spare allocation.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Board-Level Functional Fault Diagnosis Using Learning Based on Incremental Support-Vector Machines.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

Adaptive Board-Level Functional Fault Diagnosis Using Decision Trees.
Proceedings of the 21st IEEE Asian Test Symposium, 2012


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