Roberto Giorgio Rizzo

According to our database1, Roberto Giorgio Rizzo authored at least 15 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Adaptive Test-Time Augmentation for Low-Power CPU.
CoRR, 2021

On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021

AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

2020
Corrigendum to"Approximate error detection-correction for efficient adaptive voltage Over-Scaling"[Integration 63 (2018) 220-231].
Integr., 2020

2019
Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools.
PhD thesis, 2019

Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets.
Proceedings of the Sixth International Conference on Social Networks Analysis, 2019

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling.
Integr., 2018

Multiplication by Inference using Classification Trees: A Case-Study Analysis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling.
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017

Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling.
Proceedings of the New Generation of CAS, 2017

2016
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

2015
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015


  Loading...