Valentino Peluso

According to our database1, Valentino Peluso authored at least 12 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Enabling Energy-Efficient Unsupervised Monocular Depth Estimation on ARMv7-Based Platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Energy-Accuracy Scalable Deep Convolutional Neural Networks: A Pareto Analysis.
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

Energy-Driven Precision Scaling for Fixed-Point ConvNets.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Weak-MAC: Arithmetic Relaxation for Dynamic Energy-Accuracy Scaling in ConvNets.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Scalable-effort ConvNets for multilevel classification.
Proceedings of the International Conference on Computer-Aided Design, 2018

Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

All-digital embedded meters for on-line power estimation.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling.
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017

2016
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

Ultra-Fine Grain Vdd-Hopping for energy-efficient Multi-Processor SoCs.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016


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