Valentino Peluso
Orcid: 0000-0003-0527-8602
According to our database1,
Valentino Peluso
authored at least 31 papers
between 1998 and 2024.
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Bibliography
2024
Automatic Layer Freezing for Communication Efficiency in Cross-Device Federated Learning.
IEEE Internet Things J., February, 2024
2023
IEEE Embed. Syst. Lett., March, 2023
Enabling DVFS Side-Channel Attacks for Neural Network Fingerprinting in Edge Inference Services.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the 2023 IEEE World AI IoT Congress (AIIoT), 2023
2022
IEEE Trans. Circuits Syst. Video Technol., 2022
IEEE Internet Things J., 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
Optimality Assessment of Memory-Bounded ConvNets Deployed on Resource-Constrained RISC Cores.
IEEE Access, 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets.
Proceedings of the Sixth International Conference on Social Networks Analysis, 2019
Integer ConvNets on Embedded CPUs: Tools and Performance Assessment on the Cortex-A Cores.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Enabling Energy-Efficient Unsupervised Monocular Depth Estimation on ARMv7-Based Platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling.
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017
2016
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
2015
Proceedings of the 1st IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2015
1998
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998