Samuele Germiniani

Orcid: 0000-0003-0794-8606

Affiliations:
  • University of Verona, Italy


According to our database1, Samuele Germiniani authored at least 11 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Exploiting assertions mining and fault analysis to guide RTL-level approximation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
Automatic Generation of Assertions for Detection of Firmware Vulnerabilities Through Alignment of Symbolic Sequences.
IEEE Trans. Emerg. Top. Comput., 2022

HARM: A Hint-Based Assertion Miner.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Exploiting clustering and decision-tree algorithms to mine LTL assertions containing non-boolean expressions.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Assertion-aware approximate computing design exploration on behavioral models.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

Risk Assessment and Prediction in Human-Robot Interaction Through Assertion Mining and Pose Estimation.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

2021
Exploiting Program Slicing and Instruction Clusterization to Identify the Cause of Faulty Temporal Behaviours at System Level.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021

System-level bug explanation through program slicing and instruction clusterization.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

A containerized ROS-compliant verification environment for robotic systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
From Informal Specifications to an ABV Framework for Industrial Firmware Verification.
Proceedings of the VLSI-SoC: Design Trends, 2020

MIST: monitor generation from informal specifications for firmware verification.
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020


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