Santosh Biswas

According to our database1, Santosh Biswas authored at least 72 papers between 2004 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2018
Reliability-Aware Test Methodology for Detecting Short-Channel Faults in On-Chip Networks.
IEEE Trans. VLSI Syst., 2018

MATEM: A unified framework based on trust and MCDM for assuring security, reliability and QoS in DTN routing.
J. Network and Computer Applications, 2018

On-Line Analysis of Stuck-at Faults in On-Chip Network Interconnects.
Journal of Circuits, Systems, and Computers, 2018

A Game Theory Based Multi Layered Intrusion Detection Framework for Wireless Sensor Networks.
IJWIN, 2018

An Efficient Scheme to Detect Evil Twin Rogue Access Point Attack in 802.11 Wi-Fi Networks.
IJWIN, 2018

Design of light weight exact discrete event system diagnosers using measurement limitation: case study of electronic fuel injection system.
Int. J. Systems Science, 2018

A game theory based multi layered intrusion detection framework for VANET.
Future Generation Comp. Syst., 2018

Automation of Test Program Synthesis for Processor Post-silicon Validation.
J. Electronic Testing, 2018

Exact Task Completion Time Aware Real-Time Scheduling Based on Supervisory Control Theory of Timed DES.
Proceedings of the 2018 European Control Conference, 2018

2017
Fault-Tolerant Preemptive Aperiodic RT Scheduling by Supervisory Control of TDES on Multiprocessors.
ACM Trans. Embedded Comput. Syst., 2017

On-Line Testing of digital VLSI circuits at Register Transfer Level using High Level Decision Diagrams.
Microelectronics Journal, 2017

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.
I. J. Circuit Theory and Applications, 2017

A Time-Optimized Scheme Towards Analysis of Channel-Shorts in on-Chip Networks.
J. Electronic Testing, 2017

Comments on "Supervisory control for real-time scheduling of periodic and sporadic tasks with resource constraints" [Automatica 45 (2009) 2597-2604].
Automatica, 2017

xMAS Based Accurate Modeling and Progress Verification of NoCs.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Charka: A reliability-aware test scheme for diagnosis of channel shorts beyond mesh NoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Real-time scheduling of non-preemptive sporadic tasks on uniprocessor systems using Supervisory Control of timed DES.
Proceedings of the 2017 American Control Conference, 2017

2016
False alarm reduction in signature-based IDS: game theory approach.
Security and Communication Networks, 2016

Machine learning approach for detection of flooding DoS attacks in 802.11 networks and attacker localization.
Int. J. Machine Learning & Cybernetics, 2016

On-line detection and diagnosis of stuck-at faults in channels of NoC-based systems.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

A topology-agnostic test model for link shorts in on-chip networks.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

One poison is antidote against another poison.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

Detecting and diagnosing open faults in NoC channels on activation of diagonal nodes.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

Towards a Scalable Test Solution for the Analysis of Interconnect Shorts in On-chip Networks.
Proceedings of the 24th IEEE International Symposium on Modeling, 2016

An on-line test solution for addressing interconnect shorts in on-chip networks.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

An odd-even scheme to prevent a packet from being corrupted and dropped in fault tolerant NoCs.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

When Clustering Shows Optimality towards Analyzing Stuck-at Faults in Channels of On-chip Networks.
Proceedings of the 18th IEEE International Conference on High Performance Computing and Communications; 14th IEEE International Conference on Smart City; 2nd IEEE International Conference on Data Science and Systems, 2016

A Reliability-Aware Topology-Agnostic Test Scheme for Detecting, and Diagnosing Interconnect Shorts in On-chip Networks.
Proceedings of the 18th IEEE International Conference on High Performance Computing and Communications; 14th IEEE International Conference on Smart City; 2nd IEEE International Conference on Data Science and Systems, 2016

Enhancing effectiveness of intrusion detection systems: A hybrid approach.
Proceedings of the 2016 IEEE International Conference on Advanced Networks and Telecommunications Systems, 2016

Enhancing performance of anomaly based intrusion detection systems through dimensionality reduction using principal component analysis.
Proceedings of the 2016 IEEE International Conference on Advanced Networks and Telecommunications Systems, 2016

2015
A Discrete Event System Approach to Online Testing of Speed Independent Circuits.
VLSI Design, 2015

A Binary Decision Diagram based on-line testing of digital VLSI circuits for feedback bridging faults.
Microelectronics Journal, 2015

A design fix to supervisory control for fault-tolerant scheduling of real-time multiprocessor systems with aperiodic tasks.
Int. J. Control, 2015

Cannibalistic Predator-Prey Model with Disease in Predator - A Delay Model.
I. J. Bifurcation and Chaos, 2015

Advanced Stealth Man-in-The-Middle Attack in WPA2 Encrypted Wi-Fi Networks.
IEEE Communications Letters, 2015

Real-time embedded systems analysis - From theory to practice.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Directed Symbolic Execution for VLSI Circuits.
Proceedings of the 2015 IEEE International Conference on Systems, 2015

An Optimal Diagnosis of NoC Interconnects on Activation of Diagonal Routers.
Proceedings of the 2015 IEEE International Conference on Systems, 2015

Detection of De-Authentication DoS Attacks in Wi-Fi Networks: A Machine Learning Approach.
Proceedings of the 2015 IEEE International Conference on Systems, 2015

Reliability on Top of Best Effort Delivery: Maximal Connectivity Test on NoC Interconnects.
Proceedings of the 8th Annual ACM India Conference, Ghaziabad, India, October 29-31, 2015, 2015

Adaptive path selection for high throughput Heterogeneous Wireless Mesh Networks.
Proceedings of the 2015 IEEE International Conference on Advanced Networks and Telecommuncations Systems, 2015

2014
M-HRP for Wireless Mesh Networks and its performance evaluation.
Proceedings of the Sixth International Conference on Communication Systems and Networks, 2014

Detection of faulty interswitch links in 2-D mesh network-on-chips.
Proceedings of the 2014 IEEE International Conference on Advanced Networks and Telecommuncations Systems, 2014

2013
Towards reducing false alarms in network intrusion detection systems with data summarization technique.
Security and Communication Networks, 2013

Equivalence of Fair Diagnosability and Stochastic Diagnosability of Discrete Event Systems.
Proceedings of the IEEE International Conference on Systems, 2013

2012
Diagnosability of discrete event systems for temporary failures.
Computers & Electrical Engineering, 2012

An Active Detection Mechanism for Detecting ICMP Based Attacks.
Proceedings of the 11th IEEE International Conference on Trust, 2012

Detection and Mitigation of Induced Low Rate TCP-Targeted Denial of Service Attack.
Proceedings of the Sixth International Conference on Software Security and Reliability, 2012

Detection of NDP based attacks using MLD.
Proceedings of the 5th International Conference of Security of Information and Networks, 2012

2011
Network specific false alarm reduction in intrusion detection system.
Security and Communication Networks, 2011

An active DES based IDS for ARP spoofing.
Proceedings of the IEEE International Conference on Systems, 2011

Detection of neighbor solicitation and advertisement spoofing in IPv6 neighbor discovery protocol.
Proceedings of the 4th International Conference on Security of Information and Networks, 2011

Research and application of One-class small hypersphere support vector machine for network anomaly detection.
Proceedings of the Third International Conference on Communication Systems and Networks, 2011

Sequencegram: n-gram modeling of system calls for program based anomaly detection.
Proceedings of the Third International Conference on Communication Systems and Networks, 2011

A host based DES approach for detecting ARP spoofing.
Proceedings of the 2011 IEEE Symposium on Computational Intelligence in Cyber Security, 2011

E-AODV for Wireless Mesh Networks and Its Performance Evaluation.
Proceedings of the 2011 International Conference on Broadband, 2011

2010
Diagnosability of delay-deadline failures in fair real time discrete event models.
Int. J. Systems Science, 2010

Fairness of Transitions in Diagnosability of Discrete Event Systems.
Discrete Event Dynamic Systems, 2010

A BDD-based approach to design power-aware on-line detectors for digital circuits.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

An Active Intrusion Detection System for LAN Specific Attacks.
Proceedings of the Advances in Computer Science and Information Technology, 2010

Distance Based Fast Hierarchical Clustering Method for Large Datasets.
Proceedings of the Rough Sets and Current Trends in Computing, 2010

Peer-to-Peer Network Classification Using nu-Maximal Margin Spherical Structured Multiclass Support Vector Machine.
Proceedings of the Data Engineering and Management - Second International Conference, 2010

Fair diagnosability in PN-based DES models.
Proceedings of the 8th IEEE International Conference on Control and Automation, 2010

FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Layered Higher Order N-grams for Hardening Payload Based Anomaly Intrusion Detection.
Proceedings of the ARES 2010, 2010

2008
Unified Technique for on-Line Testing of Digital Circuits: Delay and Stuck-at Fault Models.
Journal of Circuits, Systems, and Computers, 2008

2006
Concurrent Testing of Digital Circuits for Advanced Fault Models.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation.
J. Electronic Testing, 2005

On-Line Testing of Digital Circuits for n-Detect and Bridging Fault Models.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004
A discrete event systems approach to online testing of digital VLSI circuits.
Proceedings of the IEEE International Conference on Systems, 2004

Optimization of the Theory of FDD of DES for Alleviation of the State Explosion Problem and Development of CAD Tools for On-line Testing of Digital VLSI Circuits.
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

A BIST Approach to On-Line Monitoring of Digital VLSI Circuits: A CAD Tool.
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004


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