Sergei Sawitzki

According to our database, Sergei Sawitzki authored at least 28 papers between 1998 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2017

FPGA-basierter Protein- und DNA-Sequenzvergleich zur optimierten Datenbanksuche mit dem BLAST-Algorithmus.

Thomas Fabian Starke, Timm Bostelmann, Sergei Sawitzki

Proceedings of the 47. Jahrestagung der Gesellschaft für Informatik, 2017

2015

Towards a guided design flow for heterogeneous reconfigurable architectures.

Timm Bostelmann, Sergei Sawitzki

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014

A conceptual toolchain for an application domain specific reconfigurable logic architecture.

Timm Bostelmann, Sergei Sawitzki

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013

Improving FPGA placement with a self-organizing map.

Timm Bostelmann, Sergei Sawitzki

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

2012

Processor design using a functional hardware description language.

Stefan Schulze, Sergej Sawitzki

Microprocess. Microsystems, 2012

2011

Design, Implementation, and Verification of an Adaptable Processor in Lava HDL.

Stefan Schulze, Sergei Sawitzki

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

Design Space Exploration of Hard-Decision Viterbi Decoding: Algorithm and VLSI Implementation.

Irfan Habib, Özgün Paker, Sergei Sawitzki

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

Multistandard FEC Decoders for Wireless Devices.

John Dielissen, Nur Engin, Sergei Sawitzki, Kees van Berkel

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Reconfigurable cell architecture for multi-standard interleaving and deinterleaving in digital communication systems.

Alexander Danilin, Sergei Sawitzki, Erik Rijshouwer

Proceedings of the FPL 2008, 2008

A Novel Routing Architecture for Field-Programmable Gate-Arrays.

Alexander Danilin, Martijn T. Bennebroek, Sergei Sawitzki

Proceedings of the Architecture of Computing Systems, 2008

2007

Mapping A VLIWxSIMD Processor on an FPGA: Scalability and Performance.

Micha Nelissen, Kees van Berkel, Sergei Sawitzki

Proceedings of the FPL 2007, 2007

Scalable reconfigurable channel decoder architecture for future wireless handsets.

Gummidipudi Krishnaiah, Nur Engin, Sergei Sawitzki

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Astra: An Advanced Space-Time Reconfigurable Architecture.

Alexander Danilin, Martijn T. Bennebroek, Sergei Sawitzki

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

A Novel Toolset for the Development of FPGA-like Reconfigurable Logic.

Alexander Danilin, Martijn T. Bennebroek, Sergei Sawitzki

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004

Optimizing the Performance of the Simulated Annealing Based Placement Algorithms for Island-Style FPGAs.

Alexander Danilin, Sergei Sawitzki

Proceedings of the Field Programmable Logic and Application, 2004

2003

Architecture Template and Design Flow to Support Applications Parallelism on Reconfigurable Platforms.

Sergej Sawitzki, Rainer G. Spallek

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002

Improving Code Efficiency for Reconfigurable VLIW Processors.

Steffen Köhler, Jens Braunes, Sergej Sawitzki, Rainer G. Spallek

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Architektur und Entwurfsfluss zur Unterstützung der Anwendungsparallelität durch rekonfigurierbare Rechnersysteme.

Sergei Sawitzki

Proceedings of the Ausgezeichnete Informatikdissertationen 2002, 2002

Anwendungsparallelität und rekonfigurierbare Rechnersysteme - Entwurfsraum, Architekturvorlage, Entwurfsfluß.

Sergei Sawitzki

Mensch und Buch, ISBN: 978-3-89820-407-1, 2002

2001

Prototyping Framework for Reconfigurable Processors.

Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek

Proceedings of the Field-Programmable Logic and Applications, 2001

Power-efficient layered turbo decoder processor.

John Dielissen, Jef L. van Meerbergen, Marco Bekooij, Françoise Harmsze, Sergej Sawitzki, Jos Huisken, Albert van der Werf

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Experimenteller Vergleich verschiedener Entwurfsmethoden für FPGA-basierte Entwurfsabläufe.

Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek, Jörg Schneider, S. Rülke

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

Formal Verification of a Reconfigurable Microprocessor.

Sergej Sawitzki, Jens Schönherr, Rainer G. Spallek, Bernd Straube

Proceedings of the Field-Programmable Logic and Applications, 2000

Formal Verification for Microprocessors with Extendable Instruction Set.

Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube

Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1999

Digital Signal Processing with General Purpose Microprocessors, DSP and Rcinfigurable Logic.

Steffen Köhler, Sergej Sawitzki, Achim Gratz, Rainer G. Spallek

Proceedings of the Parallel and Distributed Processing, 1999

Gestaltung und Simulation hardware-rekonfigurierbarer Rechnersysteme.

Sergej Sawitzki

Proceedings of the Informatik '99, 1999

A Concept for an Evaluation Framework for Reconfigurable Systems.

Sergej Sawitzki, Rainer G. Spallek

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998

Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays.

Sergej Sawitzki, Achim Gratz, Rainer G. Spallek

Proceedings of the Field-Programmable Logic and Applications, 1998