Jef L. van Meerbergen
According to our database1,
Jef L. van Meerbergen
authored at least 83 papers
between 1982 and 2011.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Low-complexity R-peak detection in ECG signals: A preliminary step towards ambulatory fetal monitoring.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
2009
J. Signal Process. Syst., 2009
2008
Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Efficient buffer capacity and scheduler setting computation for soft real-time stream processing applications.
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007
Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring.
Proceedings of the Embedded Computer Systems: Architectures, 2007
Real-time aware rendering of scalable arbitrary-shaped MPEG-4 decoder for multiprocessor systems.
Proceedings of the Real-Time Image Processing 2007, San Jose, CA, USA, January 29-30, 2007, 2007
Proceedings of the 15th International Symposium on Modeling, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Execution-time Prediction for Dynamic Streaming Applications with Task-level Parallelism.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
2006
IEEE Trans. Consumer Electron., 2006
Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies.
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2005
ACM Trans. Design Autom. Electr. Syst., 2005
Application Specific Instruction-Set Processor Template for Motion Estimation in Video Applications.
IEEE Trans. Circuits Syst. Video Technol., 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, USA, September 29, 2005
Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix.
Proceedings of the 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005), 2005
Extended abstract: estimation times of on-chip multiprocessor stream-oriented applications.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005
Algorithm/architecture co-design of the generalized sampling theorem based de-interlacer [video signal processing].
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the Software and Compilers for Embedded Systems, 8th International Workshop, 2004
Streaming scratchpad memory organization for video applications.
Proceedings of the Second IASTED International Conference on Circuits, 2004
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004
Proceedings of the 2004 Design, 2004
2003
Proceedings of the 2003 International Conference on Image Processing, 2003
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip.
Proceedings of the 2003 Design, 2003
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip.
Proceedings of the International Conference on Compilers, 2003
Proceedings of the Networks on Chip, 2003
2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the 2002 Design, 2002
2001
DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001
Phase coupled operation assignment for VLIW processors with distributed register files.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
ACM Trans. Design Autom. Electr. Syst., 2000
Heterogeneous multiprocessor for the management of real-time video and graphics streams.
IEEE J. Solid State Circuits, 2000
Compiling Applications for ConCISe: An Example of Automatic HW/SW Partitioning and Synthesis.
Proceedings of the Field-Programmable Logic and Applications, 2000
Proceedings of the 2000 Design, 2000
1999
IEEE Trans. Consumer Electron., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999
1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
1997
Proceedings of the 10th International Symposium on System Synthesis, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the European Design and Test Conference, 1997
Proceedings of the European Design and Test Conference, 1997
1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
J. VLSI Signal Process., 1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
Proceedings of the 1995 European Design and Test Conference, 1995
Proceedings of the 1995 European Design and Test Conference, 1995
Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores.
Proceedings of the 32st Conference on Design Automation, 1995
1994
Efficient timing constraint derivation for optimal retiming high speed processing units.
Proceedings of the 7th International Symposium on High Level Synthesis, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1993
J. VLSI Signal Process., 1993
J. VLSI Signal Process., 1993
A new method for retiming multi-functional processing units.
Proceedings of the VLSI 93, 1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
1992
Consumer applications: a driving force for high-level synthesis of signal-processing architectures.
IEEE Micro, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
Hierarchical Retiming Including Pipelining.
Proceedings of the VLSI 91, 1991
Proceedings of the conference on European design automation, 1991
1990
J. VLSI Signal Process., 1990
Proc. IEEE, 1990
Proceedings of the European Design Automation Conference, 1990
Proceedings of the European Design Automation Conference, 1990
1989
Interprocessor communication in synchronous multiprocessor digital signal processing chips.
IEEE Trans. Acoust. Speech Signal Process., 1989
Definition and assignment of complex data-paths suited for high throughput applications.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
1988
Architectural strategies for an application-specific synchronous multiprocessor environment.
IEEE Trans. Acoust. Speech Signal Process., 1988
1986
On the IC architecture and design of a 2 µm CMOS 8 MIPS digital signal processor with parallel processing capability: The PCB5010/5011.
Proceedings of the IEEE International Conference on Acoustics, 1986
1982
Proceedings of the IEEE International Conference on Acoustics, 1982