Kees van Berkel

Affiliations:
  • Technische Universiteit Eindhoven, The Netherlands


According to our database1, Kees van Berkel authored at least 64 papers between 1988 and 2016.

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Bibliography

2016
Modeling & analysis of an LTE-Advanced receiver using mode-controlled dataflow.
Microprocess. Microsystems, 2016

Buffer allocation for real-time streaming applications running on heterogeneous multi-processors without back-pressure.
J. Syst. Archit., 2016

Response modeling runtime schedulers for timing analysis of self-timed dataflow graphs.
J. Syst. Archit., 2016

2015
From Optimal to Real-Time Control of a Mechanical Hybrid Powertrain.
IEEE Trans. Control. Syst. Technol., 2015

Implementation of Dynamic Programming for Optimal Control Problems With Continuous States.
IEEE Trans. Control. Syst. Technol., 2015

Buffer Allocation for Dynamic Real-Time Streaming Applications Running on a Multi-processor without Back-Pressure.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

FP-scheduling for mode-controlled dataflow: a case study.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Topology and Flywheel Size Optimization for Mechanical Hybrid Powertrains.
IEEE Trans. Veh. Technol., 2014

Optimal Control of a Mechanical Hybrid Powertrain With Cold-Start Conditions.
IEEE Trans. Veh. Technol., 2014

Fast and Smooth Clutch Engagement Control for a Mechanical Hybrid Powertrain.
IEEE Trans. Control. Syst. Technol., 2014

F3: Adaptive design techniques for energy efficiency.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

10.8 A multi-standard 2G/3G/4G Cellular modem supporting carrier aggregation in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Buffer allocation for real-time streaming on a multi-processor without back-pressure.
Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014

Analyzing preemptive fixed priority scheduling of data flow graphs.
Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014

Mode-Controlled Dataflow based modeling & analysis of a 4G-LTE receiver.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Cyclo-Static Data Flow Model for TDM.
Proceedings of the 14th International Conference on Application of Concurrency to System Design, 2014

2013
Optimal Energy Management for a mechanical-hybrid vehicle with cold start conditions.
Proceedings of the 12th European Control Conference, 2013

2012
Optimal Control of a Mechanical Hybrid Powertrain.
IEEE Trans. Veh. Technol., 2012

Hard-Real-Time Scheduling on a Weakly Programmable Multi-core Processor with Application to Multi-standard Channel Decoding.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

Power/performance optimization of many-core processor SoCs.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A complexity adaptive channel estimator for low power.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Belt-pulley friction estimation for the Continuously Variable Transmission.
Proceedings of the 50th IEEE Conference on Decision and Control and European Control Conference, 2011

Optimal energy management for a flywheel-based hybrid vehicle.
Proceedings of the American Control Conference, 2011

2010
A Programmable, Scalable-Throughput Interleaver.
EURASIP J. Wirel. Commun. Netw., 2010

Silicon 3D-integration technology and systems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

High throughput, low set-up time, reconfigurable linear Feedback Shift Registers.
Proceedings of the 28th International Conference on Computer Design, 2010

2009
Scalable Multi-Input-Multi-Output Queues With Application to Variation-Tolerant Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Multi-core for mobile phones.
Proceedings of the Design, Automation and Test in Europe, 2009

Reading of cracked optical discs using Iterative Learning Control.
Proceedings of the American Control Conference, 2009

2008
Multistandard FEC Decoders for Wireless Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Performance Analysis of SoC Architectures Based on Latency-Rate Servers.
Proceedings of the Design, Automation and Test in Europe, 2008

Vectorization of Reed Solomon Decoding and Mapping on the EVP.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Mapping A VLIWxSIMD Processor on an FPGA: Scalability and Performance.
Proceedings of the FPL 2007, 2007

Cogging Compensating Piecewise Iterative Learning Control with application to a motion system.
Proceedings of the American Control Conference, 2007

2005
Vector Processing as an Enabler for Software-Defined Radio in Handheld Devices.
EURASIP J. Adv. Signal Process., 2005

Recursive Filtering on a Vector DSP with Linear Speedup.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
A 3-D Indoor Positioning Method using a Single Compact Base Station.
Proceedings of the Second IEEE International Conference on Pervasive Computing and Communications (PerCom 2004), 2004

2003
Adding synchronous and LSSD modes to asynchronous circuits.
Microprocess. Microsystems, 2003

Synchronous Full-Scan for Asynchronous Handshake Circuits.
J. Electron. Test., 2003

Ultrasonic 3D Position Estimation Using a Single Base Station.
Proceedings of the Ambient Intelligence, First European Symposium, 2003

2002
Automatic Scan Insertion and Test Generation for Asynchronous Circuits.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
Synchronous Handshake Circuits.
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

1999
Special Issue On Asynchronous Circuits And Systems.
Proc. IEEE, 1999

Modeling and design of asynchronous circuits.
Proc. IEEE, 1999

Applications of asynchronous circuits.
Proc. IEEE, 1999

Beware the three-way arbiter.
IEEE J. Solid State Circuits, 1999

1998
An Asynchronous Low-Power 80C51 Microcontroller.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998

1996
ESPRIT 6143: exploitation of asynchronous circuit technologies.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

Single-track handshake signaling with application to micropipelines and handshake circuits.
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

1995
Single-rail handshake circuits.
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995

Stretching quasi delay insensitivity by means of extended isochronic forks.
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995

A single-rail re-implementation of a DCC error detector using a generic standard-cell library.
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995

1994
A fully asynchronous low-power error corrector for the DCC player.
IEEE J. Solid State Circuits, December, 1994

Low-power operation using self-timed circuits and adaptive scaling of the supply voltage.
IEEE Trans. Very Large Scale Integr. Syst., 1994

Asynchronous Circuits for Low Power: A DCC Error Corrector.
IEEE Des. Test Comput., 1994

1993
Asynchronous Multipliers as Combinational Handshake Circuits.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

Characterization and Evaluation of a Compiled Asynchronous IC.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

VLSI Programming of a Modulo-N Counter with Constant Response Time and Constant Power.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

1992
Beware the isochronic fork.
Integr., 1992

1991
The VLSI-programming language tangram and its translation into handshake circuits.
Proceedings of the conference on European design automation, 1991

1988
The design of the VLSI image-generator ZaP.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

VLSI programming and silicon compilation; a novel approach from Philips research.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

Compilation of communicating processes into delay-insensitive circuits.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

VLSI programming.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988


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