Shinobu Asayama

According to our database1, Shinobu Asayama authored at least 3 papers between 2011 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2011
Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs.
IEEE J. Solid State Circuits, 2011


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