Shinyoung Yi
Orcid: 0000-0003-1312-657X
According to our database1,
Shinyoung Yi
authored at least 13 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection.
IEEE J. Solid State Circuits, January, 2024
2023
A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
Comput. Graph. Forum, 2022
2021
Proceedings of the 32nd Eurographics Symposium on Rendering, 2021
2020
22.5 An 8nm 18Gb/s/pin GDDR6 PHY with TX Bandwidth Extension and RX Training Technique.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
ACM Trans. Graph., 2019
An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2016
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2012
A 0.028% THD+N, 91% power-efficiency, 3-level PWM Class-D amplifier with a true differential front-end.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2010
Proceedings of the 31st IEEE Real-Time Systems Symposium, 2010
2007
Tracking multiple mobile objects using IEEE 802.15.4-based ultrasonic sensor devices.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007
2006
Proceedings of the Emerging Directions in Embedded and Ubiquitous Computing, 2006