Hyungjong Ko
According to our database1,
Hyungjong Ko
authored at least 10 papers
between 2019 and 2023.
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Bibliography
2023
A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ.
IEEE J. Solid State Circuits, 2023
A 4ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for GDDR7 Application.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 60-Gb/s/pin single-ended PAM-4 transmitter with timing skew training and low power data encoding in mimicked 10nm class DRAM process.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics.
Proceedings of the 47th ESSCIRC 2021, 2021
A 24Gb/s/pin PAM-4 Built Out Tester chip enabling PAM-4 chips test with NRZ interface ATE.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
20.3 A 4.0×3.7×1.0mm<sup>3</sup>-MEMS CMOS Integrated E-Nose with Embedded 4×Gas Sensors, a Temperature Sensor and a Relative Humidity Sensor.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019