Shuang Liang

According to our database, Shuang Liang authored at least 14 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

TA-GATES: An Encoding Scheme for Neural Network Architectures.

Xuefei Ning, Zixuan Zhou, Junbo Zhao, Tianchen Zhao, Yiping Deng, Changcheng Tang, Shuang Liang, Huazhong Yang, Yu Wang

Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

Efficient Autonomous Driving System Design: From Software to Hardware.

Yu Wang, Shulin Zeng, Kaiyuan Guo, Xuefei Ning, Yali Zhao, Zhongyuan Qiu, Changcheng Tang, Shuang Liang, Huazhong Yang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

Multi-Agent Vulnerability Discovery for Autonomous Driving with Hazard Arbitration Reward.

Weilin Liu, Ye Mu, Chao Yu, Xuefei Ning, Zhong Cao, Yi Wu, Shuang Liang, Huazhong Yang, Yu Wang

CoRR, 2021

Evaluating Efficient Performance Estimators of Neural Architectures.

Xuefei Ning, Changcheng Tang, Wenshuo Li, Zixuan Zhou, Shuang Liang, Huazhong Yang, Yu Wang

Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

Efficient Computing Platform Design for Autonomous Driving Systems.

Shuang Liang, Changcheng Tang, Xuefei Ning, Shulin Zeng, Jincheng Yu, Yu Wang, Kaiyuan Guo, Diange Yang, Tianyi Lu, Huazhong Yang

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators.

Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yi Shan, Yu Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

aw_nas: A Modularized and Extensible NAS framework.

Xuefei Ning, Changcheng Tang, Wenshuo Li, Songyi Yang, Tianchen Zhao, Niansong Zhang, Tianyi Lu, Shuang Liang, Huazhong Yang, Yu Wang

CoRR, 2020

BARS: Joint Search of Cell Topology and Layout for Accurate and Efficient Binary ARchitectures.

Tianchen Zhao, Xuefei Ning, Songyi Yang, Shuang Liang, Peng Lei, Jianfei Chen, Huazhong Yang, Yu Wang

CoRR, 2020

A Surgery of the Neural Architecture Evaluators.

Xuefei Ning, Wenshuo Li, Zixuan Zhou, Tianchen Zhao, Yin Zheng, Shuang Liang, Huazhong Yang, Yu Wang

CoRR, 2020

2019

On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA.

Yiming Hu, Shuang Liang, Jincheng Yu, Yu Wang, Huazhong Yang

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

A Fine-Grained Sparse Accelerator for Multi-Precision DNN.

Shulin Zeng, Yujun Lin, Shuang Liang, Junlong Kang, Dongliang Xie, Yi Shan, Song Han, Yu Wang, Huazhong Yang

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

DNNVM: End-to-End Compiler Leveraging Operation Fusion on FPGA-based CNN Accelerators.

Yu Xing, Shuang Liang, Lingzhi Sui, Zhen Zhang, Jiantao Qiu, Xijie Jia, Xin Liu, Yushun Wang, Yi Shan, Yu Wang

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Compressed CNN Training with FPGA-based Accelerator.

Kaiyuan Guo, Shuang Liang, Jincheng Yu, Xuefei Ning, Wenshuo Li, Yu Wang, Huazhong Yang

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

Real-Time Object Detection and Semantic Segmentation Hardware System with Deep Learning Networks.

Shaoxia Fang, Lu Tian, Junbin Wang, Shuang Liang, Dongliang Xie, Zhongmin Chen, Lingzhi Sui, Qian Yu, Xiaoming Sun, Yi Shan, Yu Wang

Proceedings of the International Conference on Field-Programmable Technology, 2018