Tianyi Lu

According to our database, Tianyi Lu authored at least 22 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Performance Assessment of a High-Frequency Radar Network for Detecting Surface Currents in the Pearl River Estuary.

Langfeng Zhu, Tianyi Lu, Fan Yang, Chunlei Wei, Jun Wei

Remote. Sens., January, 2024

2023

VideoAssembler: Identity-Consistent Video Generation with Reference Entities using Diffusion Model.

Haoyu Zhao, Tianyi Lu, Jiaxi Gu, Xing Zhang, Zuxuan Wu, Hang Xu, Yu-Gang Jiang

CoRR, 2023

Fuse Your Latents: Video Editing with Multi-source Latent Diffusion Models.

Tianyi Lu, Xing Zhang, Jiaxi Gu, Hang Xu, Renjing Pei, Songcen Xu, Zuxuan Wu

CoRR, 2023

Reuse and Diffuse: Iterative Denoising for Text-to-Video Generation.

Jiaxi Gu, Shicong Wang, Haoyu Zhao, Tianyi Lu, Xing Zhang, Zuxuan Wu, Songcen Xu, Wei Zhang, Yu-Gang Jiang, Hang Xu

CoRR, 2023

2D Eigenvalue Problem III: Convergence Analysis of the 2D Rayleigh Quotient Iteration.

Tianyi Lu, Yangfeng Su, Zhaojun Bai

CoRR, 2023

2022

A Newton-type method for two-dimensional eigenvalue problems.

Tianyi Lu, Yangfeng Su

Numer. Linear Algebra Appl., 2022

Research on steelmaking-continuous casting production scheduling problem with uncertain processing time based on Lagrangian relaxation framework.

Liangliang Sun, Tianyi Lu, Zhi Li, Ye Li, Yaqian Yu, Jinyu Liu

Int. J. Autom. Control., 2022

2D Eigenvalue Problem II: Rayleigh Quotient Iteration and Applications.

Tianyi Lu, Yangfeng Su, Zhaojun Bai

CoRR, 2022

2021

A Framework of AI-based Intelligent Adaptive Tutoring System.

Tianyi Lu, Xiaochen Shen, Huilin Liu, Bo Chen, Long Chen, Ling Yu

Proceedings of the 16th International Conference on Computer Science & Education, 2021

Efficient Computing Platform Design for Autonomous Driving Systems.

Shuang Liang, Changcheng Tang, Xuefei Ning, Shulin Zeng, Jincheng Yu, Yu Wang, Kaiyuan Guo, Diange Yang, Tianyi Lu, Huazhong Yang

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

aw_nas: A Modularized and Extensible NAS framework.

Xuefei Ning, Changcheng Tang, Wenshuo Li, Songyi Yang, Tianchen Zhao, Niansong Zhang, Tianyi Lu, Shuang Liang, Huazhong Yang, Yu Wang

CoRR, 2020

2019

An Energy-Efficient Reconfigurable Processor for Binary-and Ternary-Weight Neural Networks With Flexible Data Bit Width.

Shouyi Yin, Peng Ouyang, Jianxun Yang, Tianyi Lu, Xiudong Li, Leibo Liu, Shaojun Wei

IEEE J. Solid State Circuits, 2019

2D Eigenvalue Problems I: Existence and Number of Solutions.

Yangfeng Su, Tianyi Lu, Zhaojun Bai

CoRR, 2019

2018

Bit-Level Disturbance-Aware Memory Partitioning for Parallel Data Access for MLC STT-RAM.

Shouyi Yin, Tianyi Lu, Zhicong Xie, Leibo Liu, Shaojun Wei

IEEE Trans. Very Large Scale Integr. Syst., 2018

A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications.

Shouyi Yin, Peng Ouyang, Shibin Tang, Fengbin Tu, Xiudong Li, Shixuan Zheng, Tianyi Lu, Jiangyuan Gu, Leibo Liu, Shaojun Wei

IEEE J. Solid State Circuits, 2018

Multi-Bank Memory Aware Force Directed Scheduling for High-Level Synthesis.

Shouyi Yin, Tianyi Lu, Xianqing Yao, Zhicong Xie, Leibo Liu, Shaojun Wei

IEEE Access, 2018

An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS.

Shouyi Yin, Peng Ouyang, Jianxun Yang, Tianyi Lu, Xiudong Li, Leibo Liu, Shaojun Wei

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Operating Data-driven Predictive Analytics for Tele-diagnosis of Refrigeration Systems: A Case Study.

Tianyi Lu, Jun Du, Roger J. Jiao

Proceedings of the 2018 IEEE International Conference on Industrial Engineering and Engineering Management, 2018

2017

Conflict-Free Loop Mapping for Coarse-Grained Reconfigurable Architecture with Multi-Bank Memory.

Shouyi Yin, Xianqing Yao, Tianyi Lu, Dajiang Liu, Jiangyuan Gu, Leibo Liu, Shaojun Wei

IEEE Trans. Parallel Distributed Syst., 2017

Memory fartitioning-based modulo scheduling for high-level synthesis.

Tianyi Lu, Shouyi Yin, Xianqing Yao, Zhicong Xie, Leibo Liu, Shaojun Wei

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Joint Modulo Scheduling and Memory Partitioning with Multi-Bank Memory for High-Level Synthesis (Abstract Only).

Tianyi Lu, Shouyi Yin, Xianqing Yao, Zhicong Xie, Leibo Liu, Shaojun Wei

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016

Joint loop mapping and data placement for coarse-grained reconfigurable architecture with multi-bank memory.

Shouyi Yin, Xianqing Yao, Tianyi Lu, Leibo Liu, Shaojun Wei

Proceedings of the 35th International Conference on Computer-Aided Design, 2016