Sourav Roy
Orcid: 0000-0003-1885-3995
According to our database1,
Sourav Roy
authored at least 39 papers
between 2006 and 2024.
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Bibliography
2024
Secure and Lightweight Authentication Protocol Using PUF for the IoT-based Wireless Sensor Network.
ACM J. Emerg. Technol. Comput. Syst., January, 2024
CoRR, 2024
Calibratable Polymorphic Temperature Sensor for Detecting Fault Injection and Side-Channel Attacks.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024
Amnesiac Memory: A Self-Destructive Polymorphic Mechanism Against Cold Boot Data Remanence Attack.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
PLAKE: PUF-Based Secure Lightweight Authentication and Key Exchange Protocol for IoT.
IEEE Internet Things J., May, 2023
A Twofold Clock and Voltage-Based Detection Method for Laser Logic State Imaging Attack.
IEEE Trans. Very Large Scale Integr. Syst., 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
Frequency Reconfigurable Wearable Low-Cost Multi Band Antenna for WLAN and ISM Band Application.
Wirel. Pers. Commun., 2022
Wirel. Pers. Commun., 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
A Novel Cross-Platform Physically Unclonable Function for Emerging FPGA-based IoT Devices.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022
2021
Wirel. Pers. Commun., 2021
Ranking Barriers of Supply Chain Management by MCDM Method During Disaster Management: A Case Study of India.
Int. J. Syst. Dyn. Appl., 2021
Proceedings of the 18th International Conference on Security and Cryptography, 2021
2020
Mutual Coupling Reduction in a Multi-band MIMO Antenna Using Meta-Inspired Decoupling Network.
Wirel. Pers. Commun., 2020
IEEE Micro, 2020
2019
Wirel. Pers. Commun., 2019
Interface and Doping Engineering of HfO2 Based Multi-Level RRAM: Towards Synaptic Simulation for Neuromorphic Computation.
Proceedings of the International Conference on IC Design and Technology, 2019
Proceedings of the 2019 IEEE Symposium on High-Performance Interconnects, 2019
2018
Gain enhancement of a dual-band WLAN microstrip antenna loaded with diagonal pattern metamaterials.
IET Commun., 2018
A dual band microstrip antenna integrated with rectangular DRA for uplink and downlink C band communication.
Proceedings of the 2018 4th International Conference on Recent Advances in Information Technology (RAIT), 2018
2016
Product Release Pathways in Human and <i>Plasmodium falciparum</i> Phosphoribosyltransferase.
J. Chem. Inf. Model., 2016
Proceedings of the 24th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems, GIS 2016, Burlingame, California, USA, October 31, 2016
2015
Characterization of Terahertz Imagers Using a Narrowband Time-Domain Terahertz Radiation and Detection System.
IEICE Trans. Electron., 2015
Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine.
Proceedings of the 16th International Workshop on Microprocessor and SOC Test and Verification, 2015
Mitigating the Dark Silicon Phenomenon on Next-Generation Network Processor Architectures.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015
2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
2013
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013
2012
Proceedings of the International Symposium on Electronic System Design, 2012
2010
Int. J. Parallel Program., 2010
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010
2009
H-NMRU: A Low Area, High Performance Cache Replacement Policy for Embedded Processors.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory.
Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications, 2009
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
2006
Unraveling the nature of the segmentation clock: Intrinsic disorder of clock proteins and their interaction map.
Comput. Biol. Chem., 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006