Syed Mohsin Abbas

Orcid: 0000-0002-5719-3654

According to our database1, Syed Mohsin Abbas authored at least 17 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
List-GRAND: A Practical Way to Achieve Maximum Likelihood Decoding.
IEEE Trans. Very Large Scale Integr. Syst., 2023

Step-GRAND: A Low Latency Universal Soft-Input Decoder.
Proceedings of the IEEE Globecom Workshops 2023, 2023

2022
Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO).
J. Signal Process. Syst., 2022

High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND.
IEEE Trans. Very Large Scale Integr. Syst., 2022

GRAND for Rayleigh Fading Channels.
Proceedings of the IEEE Globecom 2022 Workshops, 2022

2021
High-Throughput VLSI Architecture for GRAND Markov Order.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

Reduced Complexity RPA Decoder for Reed-Muller Codes.
Proceedings of the 11th International Symposium on Topics in Coding, 2021

High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND.
Proceedings of the IEEE International Conference on Acoustics, 2021

2020
High-Throughput VLSI Architecture for GRAND.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

2017
High-Throughput and Energy-Efficient Belief Propagation Polar Code Decoder.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Concatenated LDPC-polar codes decoding through belief propagation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

2015
FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Low Complexity Belief Propagation Polar Code Decoders.
CoRR, 2015

Low complexity belief propagation polar code decoder.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

2014
An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory.
IEEE Trans. Computers, 2014


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