Warren J. Gross

According to our database1, Warren J. Gross authored at least 219 papers between 1998 and 2020.

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Bibliography

2020
A Linear-Complexity Channel-Independent Code Construction Method for List Sphere Polar Decoder.
J. Signal Process. Syst., 2020

An Efficient Software List Sphere Decoder for Polar Codes.
J. Signal Process. Syst., 2020

An Efficient Software Stack Sphere Decoder for Polar Codes.
IEEE Trans. Veh. Technol., 2020

Efficient Sphere Polar Decoding via Synchronous Determination.
IEEE Trans. Veh. Technol., 2020

Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation.
IEEE Trans. Signal Process., 2020

High-Throughput Low-Latency Encoder and Decoder for a Class of Generalized Reed-Solomon Codes for Short-Reach Optical Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Polar Compiler: Auto-Generator of Hardware Architectures for Polar Encoders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

In-Hardware Training Chip Based on CMOS Invertible Logic for Machine Learning.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Energy-Efficient Hardware Architectures for Fast Polar Decoders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Fast and Efficient Convolutional Accelerator for Edge Computing.
IEEE Trans. Computers, 2020

On Systematic Polarization-Adjusted Convolutional (PAC) Codes.
CoRR, 2020

Decoding Polar Codes with Reinforcement Learning.
CoRR, 2020

Training Hardware for Binarized Convolutional Neural Network Based on CMOS Invertible Logic.
IEEE Access, 2020

High-Throughput VLSI Architecture for GRAND.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Fast Thresholded SC-Flip Decoding of Polar Codes.
Proceedings of the 2020 IEEE International Conference on Communications, 2020

Simplified Dynamic SC-Flip Polar Decoding.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

Probabilistic Sequential Multi-Objective Optimization of Convolutional Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Operation Merging for Hardware Implementations of Fast Polar Decoders.
J. Signal Process. Syst., 2019

An Improved Software List Sphere Polar Decoder With Synchronous Determination.
IEEE Trans. Veh. Technol., 2019

Rate-Flexible Fast Polar Decoders.
IEEE Trans. Signal Process., 2019

Stochastic Bit-Wise Iterative Decoding of Polar Codes.
IEEE Trans. Signal Process., 2019

Improved Bit-Flipping Algorithm for Successive Cancellation Decoding of Polar Codes.
IEEE Trans. Commun., 2019

Efficient CMOS Invertible Logic Using Stochastic Computing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Design and Implementation of a Polar Codes Blind Detection Scheme.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Fast Decoding of Multi-Kernel Polar Codes.
Proceedings of the 2019 IEEE Wireless Communications and Networking Conference, 2019

Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes.
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

The Synthesis of XNOR Recurrent Neural Networks with Stochastic Logic.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Learning Recurrent Binary/Ternary Weights.
Proceedings of the 7th International Conference on Learning Representations, 2019

Stochastic-Computing Based Brainwave LSI Towards an Intelligence Edge.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes.
Proceedings of the 2019 IEEE International Conference on Communications, 2019

Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes.
Proceedings of the 2019 IEEE International Conference on Communications, 2019

Efficient Flicker-Free FEC Codes Using Knuth's Balancing Algorithm for VLC.
Proceedings of the 2019 IEEE Global Communications Conference, 2019

Learning to Skip Ineffectual Recurrent Computations in LSTMs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Length-Compatible Polar Codes: A Survey : (Invited Paper).
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019

A Design Framework for Invertible Logic.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018
A Modular Architecture for Structured Long Block-Length LDPC Decoders.
J. Signal Process. Syst., 2018

Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors.
J. Signal Process. Syst., 2018

Low-Latency Software Polar Decoders.
J. Signal Process. Syst., 2018

Fast Low-Complexity Decoders for Low-Rate Polar Codes.
J. Signal Process. Syst., 2018

A Generalized Stochastic Implementation of the Disparity Energy Model for Depth Perception.
J. Signal Process. Syst., 2018

Modeling and Energy Optimization of LDPC Decoder Circuits With Timing Violations.
IEEE Trans. Commun., 2018

Decoder Partitioning: Towards Practical List Decoding of Polar Codes.
IEEE Trans. Commun., 2018

A Multi-Kernel Multi-Code Polar Decoder Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 9.52 dB NCG FEC Scheme and 162 b/Cycle Low-Complexity Product Decoder Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

An Architecture to Accelerate Convolution in Deep Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Deep Learning Methods for Improved Decoding of Linear Codes.
IEEE J. Sel. Top. Signal Process., 2018

An Accuracy/Energy-Flexible Configurable Gabor-Filter Chip Based on Stochastic Computation With Dynamic Voltage-Frequency-Length Scaling.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Towards Practical Software Stack Decoding of Polar Codes.
CoRR, 2018

Improved successive cancellation flip decoding of polar codes based on error distribution.
Proceedings of the 2018 IEEE Wireless Communications and Networking Conference Workshops, 2018

Neural Successive Cancellation Decoding of Polar Codes.
Proceedings of the 19th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2018

Efficient Operation Scheduling in Successive-Cancellation-based polar decoders.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

A Multi-Mode Accelerator for Pruned Deep Neural Networks.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Stochastic Computing based BCH Decoder for WBAN Systems.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Decoding Reed-Muller and Polar Codes by Successive Factor Graph Permutations.
Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018

Low-Complexity Software Stack Decoding of Polar Codes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Convolutional Accelerator for Neural Networks With Binary Weights.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Study of Stochastic Invertible Multiplier Designs.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Partitioned Successive-Cancellation Flip Decoding of Polar Codes.
Proceedings of the 2018 IEEE International Conference on Communications, 2018

Bit-Wise Iterative Decoding of Polar Codes using Stochastic Computing.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

On the Decoding of Polar Codes on Permuted Factor Graphs.
Proceedings of the IEEE Global Communications Conference, 2018

Learning from the Syndrome.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017
VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Fast and Flexible Successive-Cancellation List Decoders for Polar Codes.
IEEE Trans. Signal Process., 2017

Implementation of Sparse Superposition Codes.
IEEE Trans. Signal Process., 2017

Blind Detection With Polar Codes.
IEEE Commun. Lett., 2017

Memory-Efficient Polar Decoders.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2017

PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2017

Multi-Mode Inference Engine for Convolutional Neural Networks.
CoRR, 2017

Fast Simplified Successive-Cancellation List Decoding of Polar Codes.
Proceedings of the 2017 IEEE Wireless Communications and Networking Conference Workshops, 2017

Reduced-memory high-throughput fast-SSC polar code decoder architecture.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Efficient bit-channel reliability computation for multi-mode polar code encoders and decoders.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Neural offset min-sum decoding.
Proceedings of the 2017 IEEE International Symposium on Information Theory, 2017

Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks.
Proceedings of the 5th International Conference on Learning Representations, 2017

A distributed constrained-form support vector machine.
Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Partitioned List Decoding of Polar Codes: Analysis and Improvement of Finite Length Performance.
Proceedings of the 2017 IEEE Global Communications Conference, 2017

A theory of generalized proximity for ADMM.
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017

Activation pruning of deep convolutional neural networks.
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017

Accuracy/energy-flexible stochastic configurable 2D Gabor filter with instant-on capability.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

On error-correction performance and implementation of polar code list decoders for 5G.
Proceedings of the 55th Annual Allerton Conference on Communication, 2017

On the performance of polar codes for 5G eMBB control channel.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

High-Speed Decoders for Polar Codes
Springer, ISBN: 978-3-319-59781-2, 2017

2016
Guest Editorial: Design and Implementation of DSP Systems.
J. Signal Process. Syst., 2016

Fault-Tolerant Associative Memories Based on c-Partite Graphs.
IEEE Trans. Signal Process., 2016

Flexible and Low-Complexity Encoding and Decoding of Systematic Polar Codes.
IEEE Trans. Commun., 2016

A Fast Polar Code List Decoder Architecture Based on Sphere Decoding.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Multi-Mode Unrolled Architectures for Polar Decoders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Fast List Decoders for Polar Codes.
IEEE J. Sel. Areas Commun., 2016

A Relaxed Min-Sum LDPC Decoder With Simplified Check Nodes.
IEEE Commun. Lett., 2016

Hardware Implementation of Associative Memories Based on Multiple-Valued Sparse Clustered Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

A 9.96 dB NCG FEC scheme and 164 bits/cycle low-complexity product decoder architecture.
CoRR, 2016

Stochastic Computing Can Improve Upon Digital Spiking Neural Networks.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Sparse-Clustered Network with Selective Decoding for Internet Traffic Classification.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Finite-length quasi-synchronous LDPC decoders.
Proceedings of the 9th International Symposium on Turbo Codes and Iterative Information Processing, 2016

VLSI implementation of deep neural networks using integral stochastic computing.
Proceedings of the 9th International Symposium on Turbo Codes and Iterative Information Processing, 2016

Simplified Successive-Cancellation List decoding of polar codes.
Proceedings of the IEEE International Symposium on Information Theory, 2016

Matrix reordering for efficient list sphere decoding of polar codes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Hardware decoders for polar codes: An overview.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Neural networks designing neural networks: multi-objective hyper-parameter optimization.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Partitioned successive-cancellation list decoding of polar codes.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Hardware implementation of FIR/IIR digital filters using integral stochastic computation.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

In-network linear regression with arbitrarily split data matrices.
Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016

Stall pattern avoidance in polynomial product codes.
Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016

A real-time remote video streaming platform for ultrasound imaging.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

A multi-Gbps unrolled hardware list decoder for a systematic polar code.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Architecture-Aware Real-Time Compression of Execution Traces.
ACM Trans. Embed. Comput. Syst., 2015

Gabor Filter Based on Stochastic Computation.
IEEE Signal Process. Lett., 2015

Parallel finite element technique using Gaussian belief propagation.
Comput. Phys. Commun., 2015

Unrolled Polar Decoders, Part II: Fast List Decoders.
CoRR, 2015

Unrolled Polar Decoders, Part I: Hardware Architectures.
CoRR, 2015

A 638 Mbps low-complexity rate 1/2 polar decoder on FPGAs.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Sparse superposition codes: A practical approach.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Stochastic implementation of the disparity energy model for depth perception.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Algorithm and implementation of an associative memory for oriented edge detection using improved clustered neural networks.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Frequency-flexible stochastic Gabor filter.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

Energy optimization of LDPC decoder circuits with timing violations.
Proceedings of the 2015 IEEE International Conference on Communications, 2015

Restricted Clustered Neural Network for Storing Real Data.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

Efficient implementation of structured long block-length LDPC codes.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

Mixed-signal implementation of differential decoding using binary message passing algorithms.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

List sphere decoding of polar codes.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014
Clockless Stochastic Decoding of Low-Density Parity-Check Codes: Architecture and Simulation Model.
J. Signal Process. Syst., 2014

Algorithm and Architecture of Fully-Parallel Associative Memories Based on Sparse Clustered Networks.
J. Signal Process. Syst., 2014

Latest Advances on Design and Implementation of DSP Systems.
J. Signal Process. Syst., 2014

Recent Advances in Design and Implementation of Signal Processing Systems.
J. Signal Process. Syst., 2014

A Scalable Successive-Cancellation Decoder for Polar Codes.
IEEE Trans. Signal Process., 2014

High-Throughput Energy-Efficient LDPC Decoders Using Differential Binary Message Passing.
IEEE Trans. Signal Process., 2014

Dynamically Instrumenting the QEMU Emulator for Linux Process Trace Generation with the GDB Debugger.
ACM Trans. Embed. Comput. Syst., 2014

High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Hardware Architecture for List Successive Cancellation Decoding of Polar Codes.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Fast Polar Decoders: Algorithm and Implementation.
IEEE J. Sel. Areas Commun., 2014

On the Chandra-Poram-Bose symbol error probability expression for coherent orthogonal <i>M</i>-ary frequency shift keying.
Int. J. Commun. Syst., 2014

Asynchronous Stochastic Decoding of LDPC Codes: Algorithm and Simulation Model.
IEICE Trans. Inf. Syst., 2014

A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

A 237 Gbps Unrolled Hardware Polar Decoder.
CoRR, 2014

Increasing the speed of polar list decoders.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Algorithm and architecture for a multiple-field context-driven search engine using fully-parallel clustered associative memories.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Analog-to-stochastic converter using magnetic-tunnel junction devices.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

Associative Memories Based on Multiple-Valued Sparse Clustered Networks.
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

Cluster-based associative memories built from unreliable storage.
Proceedings of the IEEE International Conference on Acoustics, 2014

Fast software polar decoders.
Proceedings of the IEEE International Conference on Acoustics, 2014

Autogenerating software polar decoders.
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014

Energy-efficient gear-shift LDPC decoders.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013
Guest Editors' Introduction to Special Issue on Advances in DSP System Design.
J. Signal Process. Syst., 2013

A Semi-Parallel Successive-Cancellation Decoder for Polar Codes.
IEEE Trans. Signal Process., 2013

Adaptive Multiset Stochastic Decoding of Non-Binary LDPC Codes.
IEEE Trans. Signal Process., 2013

Stochastic Decoding of LDPC Codes over GF(q).
IEEE Trans. Commun., 2013

Relaxed Half-Stochastic Belief Propagation.
IEEE Trans. Commun., 2013

High-throughput CAM based on a synchronous overlapped search scheme.
IEICE Electron. Express, 2013

Increasing the Throughput of Polar Decoders.
IEEE Commun. Lett., 2013

A Fast Software Polar Decoder.
CoRR, 2013

Lowering Error Floors in Stochastic Decoding of LDPC Codes Based on Wire-Delay Dependent Asynchronous Updating.
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Polar codes for data storage applications.
Proceedings of the International Conference on Computing, Networking and Communications, 2013

Reduced-complexity binary-weight-coded associative memories.
Proceedings of the IEEE International Conference on Acoustics, 2013

Scalable successive-cancellation hardware decoder for polar codes.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Selective decoding in associative memories based on Sparse-Clustered Networks.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Low-power area-efficient large-scale IP lookup engine based on binary-weighted clustered networks.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

A Low-Energy Variation-Tolerant Asynchronous TCAM for Network Intrusion Detection Systems.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

A low-power Content-Addressable Memory based on clustered-sparse networks.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Hardware Implementation of Successive-Cancellation Decoders for Polar Codes.
J. Signal Process. Syst., 2012

Dithered Belief Propagation Decoding.
IEEE Trans. Commun., 2012

Efficient Stochastic Decoding of Non-Binary LDPC Codes with Degree-Two Variable Nodes.
IEEE Commun. Lett., 2012

Low-Complexity Channel-Likelihood Estimation for Non-Binary Codes and QAM.
IEEE Commun. Lett., 2012

Joint Stochastic Decoding of LDPC Codes and Partial-Response Channels.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Clockless Stochastic Decoding of Low-Density Parity-Check Codes.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Stochastic chase decoder for reed-solomon codes.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Compressing multisets using tries.
Proceedings of the 2012 IEEE Information Theory Workshop, 2012

Random clique codes.
Proceedings of the 7th International Symposium on Turbo Codes and Iterative Information Processing, 2012

Asynchronous Stochastic Decoding of Low-Density Parity-Check Codes.
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Relaxed Gaussian Belief Propagation.
Proceedings of the 2012 IEEE International Symposium on Information Theory, 2012

Architecture and implementation of an associative memory using sparse clustered networks.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

High-throughput LDPC decoding using the RHS algorithm.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Faulty Gallager-B decoding with optimal message repetition.
Proceedings of the 50th Annual Allerton Conference on Communication, 2012

2011
Tracking Forecast Memories for Stochastic Decoding.
J. Signal Process. Syst., 2011

Delayed Stochastic Decoding of LDPC Codes.
IEEE Trans. Signal Process., 2011

Stochastic Multiple Stream Decoding of Cortex Codes.
IEEE Trans. Signal Process., 2011

GNSS Modulation: A Unified Statistical Description.
IEEE Trans. Aerosp. Electron. Syst., 2011

Hardware architectures for successive cancellation decoding of polar codes.
Proceedings of the IEEE International Conference on Acoustics, 2011

2010
Relaxation dynamics in stochastic iterative decoders.
IEEE Trans. Signal Process., 2010

Majority-based tracking forecast memories for stochastic LDPC decoding.
IEEE Trans. Signal Process., 2010

Stochastic Decoding of Turbo Codes.
IEEE Trans. Signal Process., 2010

A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Stochastic Chase Decoding of Reed-Solomon Codes.
IEEE Commun. Lett., 2010

Switching Activity in Stochastic Decoders.
Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010

Lowering Error Floors Using Dithered Belief Propagation.
Proceedings of the Global Communications Conference, 2010

On the code tracking performance of GNSS modulation.
Proceedings of the 44th Annual Conference on Information Sciences and Systems, 2010

2009
3-D Brain MRI Tissue Classification on FPGAs.
IEEE Trans. Image Process., 2009

Turbo decoding of product codes using adaptive belief propagation.
IEEE Trans. Commun., 2009

Bidirectional interleavers for LDPC decoders using transmission gates.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Stochastic Decoding of LDPC Codes over GF(q).
Proceedings of IEEE International Conference on Communications, 2009

Tracking Forecast Memories in stochastic decoders.
Proceedings of the IEEE International Conference on Acoustics, 2009

A Relaxed Half-Stochastic Iterative Decoder for LDPC Codes.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Design and FPGA implementation of iterative decoders for codes on graphs.
Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, 2009

2008
Fully Parallel Stochastic LDPC Decoders.
IEEE Trans. Signal Process., 2008

Stochastic Decoding of Linear Block Codes With High-Density Parity-Check Matrices.
IEEE Trans. Signal Process., 2008

Particle graphics on reconfigurable hardware.
ACM Trans. Reconfigurable Technol. Syst., 2008

The Mixed-Radix Chinese Remainder Theorem and Its Applications to Residue Comparison.
IEEE Trans. Computers, 2008

FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method.
Comput. Phys. Commun., 2008

GridCell: a stochastic particle-based biological system simulator.
BMC Syst. Biol., 2008

Configurable Flow Models for FPGA Particle Graphics Engines.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

2007
Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding.
IEEE Trans. Very Large Scale Integr. Syst., 2007

An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

A stochastic particle-based biological system simulator.
Proceedings of the 2007 Summer Computer Simulation Conference, 2007

Survey of Stochastic Computation on Factor Graphs.
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

Turbo Decoding of Product Codes based on the Modified Adaptive Belief Propagation Algorithm.
Proceedings of the IEEE International Symposium on Information Theory, 2007

Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer.
Proceedings of the FPL 2007, 2007

Evaluation of a High-Level-Language Methodology for High-Performance Reconfigurable Computers.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes.
IEEE Trans. Commun., 2006

Stochastic decoding of LDPC codes.
IEEE Commun. Lett., 2006

Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders.
J. VLSI Signal Process., 2005

An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

FPGA Particle Graphics Hardware.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2003
VLSI architectures for the MAP algorithm.
IEEE Trans. Commun., 2003

2001
Ultra-small MOSFETs: The Importance of the Full Coulomb Interaction on Device Characteristics.
VLSI Design, 2001

2000
3D Simulations of Ultra-small MOSFETs with Real-space Treatment of the Electron - Electron and Electron-ion Interactions.
VLSI Design, 2000

1998
Convergence Properties of the Bi-CGSTAB Method for the Solution of the 3D Poisson and 3D Electron Current Continuity Equations for Scaled Si MOSFETs.
VLSI Design, 1998


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