Warren J. Gross
Orcid: 0000-0002-6226-6037
According to our database1,
Warren J. Gross
authored at least 278 papers
between 1998 and 2024.
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Bibliography
2024
CoRR, 2024
CoRR, 2024
CoRR, 2024
2023
Fast-Converging Simulated Annealing for Ising Models Based on Integral Stochastic Computing.
IEEE Trans. Neural Networks Learn. Syst., December, 2023
J. Signal Process. Syst., July, 2023
IEEE Trans. Veh. Technol., May, 2023
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
IEEE Trans. Very Large Scale Integr. Syst., 2023
SSS3D: Fast Neural Architecture Search For Efficient Three-Dimensional Semantic Segmentation.
CoRR, 2023
CoRR, 2023
Stochastic Quantum Monte Carlo Algorithm for Large-Scale Combinatorial Optimization Problems.
CoRR, 2023
Proceedings of the 12th International Symposium on Topics in Coding, 2023
Proceedings of the IEEE International Symposium on Information Theory, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
High-Throughput Edge Inference for BERT Models via Neural Architecture Search and Pipeline.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the IEEE Globecom Workshops 2023, 2023
Proceedings of the 20th Conference on Robots and Vision, 2023
Efficient 1D Grouped Convolution for PyTorch a Case Study: Fast On-Device Fine-Tuning for SqueezeBERT.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO).
J. Signal Process. Syst., 2022
IEEE Trans. Veh. Technol., 2022
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND.
IEEE Trans. Very Large Scale Integr. Syst., 2022
IEEE Trans. Signal Process., 2022
DsMLP: A Learning-Based Multi-Layer Perception for MIMO Detection Implemented by Dynamic Stochastic Computing.
IEEE Trans. Signal Process., 2022
IEEE Trans. Commun., 2022
IEEE Commun. Lett., 2022
IEEE Access, 2022
BERTPerf: Inference Latency Predictor for BERT on ARM big.LITTLE Multi-Core Processors.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 26th International Conference on Pattern Recognition, 2022
Proceedings of the IEEE Globecom 2022 Workshops, 2022
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022
Work-in-Progress: Utilizing latency and accuracy predictors for efficient hardware-aware NAS.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022
Work-in-Progress: SuperNAS: Fast Multi-Objective SuperNet Architecture Search for Semantic Segmentation.
Proceedings of the International Conference on Compilers, 2022
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
2021
J. Signal Process. Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Implementing Convolutional Neural Networks Using Hartley Stochastic Computing With Adaptive Rate Feature Map Compression.
IEEE Open J. Circuits Syst., 2021
IEEE Commun. Lett., 2021
IEEE Commun. Lett., 2021
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
Proceedings of the 11th International Symposium on Topics in Coding, 2021
Proceedings of the 11th International Symposium on Topics in Coding, 2021
Proceedings of the ICC 2021, 2021
Towards Practical Near-Maximum-Likelihood Decoding of Error-Correcting Codes: An Overview.
Proceedings of the IEEE International Conference on Acoustics, 2021
Proceedings of the IEEE International Conference on Acoustics, 2021
Proceedings of the IEEE Globecom 2021 Workshops, Madrid, Spain, December 7-11, 2021, 2021
2020
A Linear-Complexity Channel-Independent Code Construction Method for List Sphere Polar Decoder.
J. Signal Process. Syst., 2020
J. Signal Process. Syst., 2020
IEEE Trans. Veh. Technol., 2020
IEEE Trans. Veh. Technol., 2020
IEEE Trans. Signal Process., 2020
High-Throughput Low-Latency Encoder and Decoder for a Class of Generalized Reed-Solomon Codes for Short-Reach Optical Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Computers, 2020
Training Hardware for Binarized Convolutional Neural Network Based on CMOS Invertible Logic.
IEEE Access, 2020
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020
Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Regression-Based Method to Synthesize Complex Arithmetic Computations on Stochastic Streams.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 2020 IEEE International Conference on Communications, 2020
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020
Proceedings of the IEEE Global Communications Conference, 2020
Probabilistic Sequential Multi-Objective Optimization of Convolutional Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
J. Signal Process. Syst., 2019
IEEE Trans. Veh. Technol., 2019
IEEE Trans. Signal Process., 2019
IEEE Trans. Commun., 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Proceedings of the 2019 IEEE Wireless Communications and Networking Conference, 2019
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019
Proceedings of the 7th International Conference on Learning Representations, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 2019 IEEE International Conference on Communications, 2019
Proceedings of the 2019 IEEE International Conference on Communications, 2019
Proceedings of the 2019 IEEE Global Communications Conference, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
J. Signal Process. Syst., 2018
Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors.
J. Signal Process. Syst., 2018
J. Signal Process. Syst., 2018
A Generalized Stochastic Implementation of the Disparity Energy Model for Depth Perception.
J. Signal Process. Syst., 2018
IEEE Trans. Commun., 2018
IEEE Trans. Commun., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
A 9.52 dB NCG FEC Scheme and 162 b/Cycle Low-Complexity Product Decoder Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE J. Sel. Top. Signal Process., 2018
An Accuracy/Energy-Flexible Configurable Gabor-Filter Chip Based on Stochastic Computation With Dynamic Voltage-Frequency-Length Scaling.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Improved successive cancellation flip decoding of polar codes based on error distribution.
Proceedings of the 2018 IEEE Wireless Communications and Networking Conference Workshops, 2018
Proceedings of the 19th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2018
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Conference on Communications, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the IEEE Global Communications Conference, 2018
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Signal Process., 2017
IEEE J. Emerg. Sel. Topics Circuits Syst., 2017
Proceedings of the 2017 IEEE Wireless Communications and Networking Conference Workshops, 2017
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017
Efficient bit-channel reliability computation for multi-mode polar code encoders and decoders.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017
Proceedings of the 2017 IEEE International Symposium on Information Theory, 2017
Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks.
Proceedings of the 5th International Conference on Learning Representations, 2017
Proceedings of the 2017 IEEE International Conference on Acoustics, 2017
Partitioned List Decoding of Polar Codes: Analysis and Improvement of Finite Length Performance.
Proceedings of the 2017 IEEE Global Communications Conference, 2017
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017
Accuracy/energy-flexible stochastic configurable 2D Gabor filter with instant-on capability.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
On error-correction performance and implementation of polar code list decoders for 5G.
Proceedings of the 55th Annual Allerton Conference on Communication, 2017
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
2016
J. Signal Process. Syst., 2016
IEEE Trans. Signal Process., 2016
IEEE Trans. Commun., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Hardware Implementation of Associative Memories Based on Multiple-Valued Sparse Clustered Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016
A 9.96 dB NCG FEC scheme and 164 bits/cycle low-complexity product decoder architecture.
CoRR, 2016
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
Sparse-Clustered Network with Selective Decoding for Internet Traffic Classification.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
Proceedings of the 9th International Symposium on Turbo Codes and Iterative Information Processing, 2016
Proceedings of the 9th International Symposium on Turbo Codes and Iterative Information Processing, 2016
Proceedings of the IEEE International Symposium on Information Theory, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Neural networks designing neural networks: multi-objective hyper-parameter optimization.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016
Hardware implementation of FIR/IIR digital filters using integral stochastic computation.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016
Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016
Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
2015
Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2015
ACM Trans. Embed. Comput. Syst., 2015
Comput. Phys. Commun., 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
Algorithm and implementation of an associative memory for oriented edge detection using improved clustered neural networks.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
Proceedings of the 2015 IEEE International Conference on Communications, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
Mixed-signal implementation of differential decoding using binary message passing algorithms.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015
2014
Clockless Stochastic Decoding of Low-Density Parity-Check Codes: Architecture and Simulation Model.
J. Signal Process. Syst., 2014
Algorithm and Architecture of Fully-Parallel Associative Memories Based on Sparse Clustered Networks.
J. Signal Process. Syst., 2014
J. Signal Process. Syst., 2014
J. Signal Process. Syst., 2014
IEEE Trans. Signal Process., 2014
High-Throughput Energy-Efficient LDPC Decoders Using Differential Binary Message Passing.
IEEE Trans. Signal Process., 2014
Dynamically Instrumenting the QEMU Emulator for Linux Process Trace Generation with the GDB Debugger.
ACM Trans. Embed. Comput. Syst., 2014
High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Circuits Syst. II Express Briefs, 2014
On the Chandra-Poram-Bose symbol error probability expression for coherent orthogonal <i>M</i>-ary frequency shift keying.
Int. J. Commun. Syst., 2014
IEICE Trans. Inf. Syst., 2014
A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
Algorithm and architecture for a multiple-field context-driven search engine using fully-parallel clustered associative memories.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
J. Signal Process. Syst., 2013
IEEE Trans. Signal Process., 2013
IEEE Trans. Signal Process., 2013
IEICE Electron. Express, 2013
Lowering Error Floors in Stochastic Decoding of LDPC Codes Based on Wire-Delay Dependent Asynchronous Updating.
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013
Proceedings of the International Conference on Computing, Networking and Communications, 2013
Proceedings of the IEEE International Conference on Acoustics, 2013
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013
Low-power area-efficient large-scale IP lookup engine based on binary-weighted clustered networks.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
A Low-Energy Variation-Tolerant Asynchronous TCAM for Network Intrusion Detection Systems.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
J. Signal Process. Syst., 2012
Efficient Stochastic Decoding of Non-Binary LDPC Codes with Degree-Two Variable Nodes.
IEEE Commun. Lett., 2012
IEEE Commun. Lett., 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 2012 IEEE Information Theory Workshop, 2012
Proceedings of the 7th International Symposium on Turbo Codes and Iterative Information Processing, 2012
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012
Proceedings of the 2012 IEEE International Symposium on Information Theory, 2012
Architecture and implementation of an associative memory using sparse clustered networks.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
Proceedings of the 50th Annual Allerton Conference on Communication, 2012
2011
IEEE Trans. Signal Process., 2011
IEEE Trans. Aerosp. Electron. Syst., 2011
JOCN, 2011
Proceedings of the IEEE International Conference on Acoustics, 2011
2010
IEEE Trans. Signal Process., 2010
IEEE Trans. Signal Process., 2010
IEEE Trans. Circuits Syst. II Express Briefs, 2010
Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010
Proceedings of the Global Communications Conference, 2010
Proceedings of the 44th Annual Conference on Information Sciences and Systems, 2010
Proceedings of the 48th Annual Allerton Conference on Communication, 2010
2009
IEEE Trans. Commun., 2009
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
Proceedings of IEEE International Conference on Communications, 2009
Proceedings of the IEEE International Conference on Acoustics, 2009
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009
Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, 2009
2008
IEEE Trans. Signal Process., 2008
ACM Trans. Reconfigurable Technol. Syst., 2008
The Mixed-Radix Chinese Remainder Theorem and Its Applications to Residue Comparison.
IEEE Trans. Computers, 2008
FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method.
Comput. Phys. Commun., 2008
BMC Syst. Biol., 2008
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008
2007
Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding.
IEEE Trans. Very Large Scale Integr. Syst., 2007
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
Proceedings of the 2007 Summer Computer Simulation Conference, 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Turbo Decoding of Product Codes based on the Modified Adaptive Belief Propagation Algorithm.
Proceedings of the IEEE International Symposium on Information Theory, 2007
Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer.
Proceedings of the FPL 2007, 2007
Evaluation of a High-Level-Language Methodology for High-Performance Reconfigurable Computers.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
IEEE Trans. Commun., 2006
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006
2005
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders.
J. VLSI Signal Process., 2005
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005
2004
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004
2003
2001
Ultra-small MOSFETs: The Importance of the Full Coulomb Interaction on Device Characteristics.
VLSI Design, 2001
2000
3D Simulations of Ultra-small MOSFETs with Real-space Treatment of the Electron - Electron and Electron-ion Interactions.
VLSI Design, 2000
1998
Convergence Properties of the Bi-CGSTAB Method for the Solution of the 3D Poisson and 3D Electron Current Continuity Equations for Scaled Si MOSFETs.
VLSI Design, 1998