Taku Umebayashi

According to our database1, Taku Umebayashi authored at least 5 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021
Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory Application.
Proceedings of the IEEE International Memory Workshop, 2021

2017

2013
A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013


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