Tao Chen

Orcid: 0000-0002-4980-6836

Affiliations:
  • Iowa State University, Department of Electrical and Computer Engineering, Ames, IA, USA


According to our database1, Tao Chen authored at least 14 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2020
A Low-Cost On-Chip Built-In Self-Test Solution for ADC Linearity Test.
IEEE Trans. Instrum. Meas., 2020

An Ultrafast Multibit/Stage Pipelined ADC Testing and Calibration Method.
IEEE Trans. Instrum. Meas., 2020

A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier.
IEEE Trans. Circuits Syst., 2020

2019
Built-in self-test and self-calibration for analog and mixed signal circuits.
Proceedings of the IEEE International Test Conference, 2019

2018
High-Purity Sine Wave Generation Using Nonlinear DAC With Predistortion Based on Low-Cost Accurate DAC-ADC Co-Testing.
IEEE Trans. Instrum. Meas., 2018

USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-in Self-Test.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Low-cost and accurate DAC linearity test with ultrafast segmented model identification of linearity errors and removal of measurement errors (uSMILE-ROME).
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2018

2017
A Low-cost Dithering Method for Improving ADC Linearity Test Applied in uSMILE Algorithm.
J. Electron. Test., 2017

An on-chip ADC BIST solution and the BIST enabled calibration scheme.
Proceedings of the IEEE International Test Conference, 2017

2016
Accurate linearity testing with impure sinusoidal stimulus robust against flicker noise.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Low-cost dithering generator for accurate ADC linearity test.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Ultrafast stimulus error removal algorithm for ADC linearity test.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Effect of flicker noise on SEIR for accurate ADC linearity testing.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

High-constancy offset generator robust to CDAC nonlinearity for SEIR-based ADC BIST.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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