Randall L. Geiger

Affiliations:
  • Iowa State University, Ames, Iowa, USA


According to our database1, Randall L. Geiger authored at least 140 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1990, "For contributions to discrete and integrated analog circuit design.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
A Compact and Accurate MOS-based Temperature Sensor for Thermal Management.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Very Compact Temperature Sensor for Power/Thermal Management.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 15μW Low Cost CMOS Smart Temperature Sensor.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

An Improved Single-Temperature Trim Technique for 1<sup>st</sup> Order-Compensated Bandgap References.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Sub-ppm/°C High Performance Voltage Reference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Resistorless Precision Curvature-Compensated Bandgap Voltage Reference Based on the VGO Extraction Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Hardware Security Vulnerability in Analog Signal Chain Filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Sub-ppm/°C Bandgap References With Natural Basis Expansion for Curvature Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
A Low-Cost On-Chip Built-In Self-Test Solution for ADC Linearity Test.
IEEE Trans. Instrum. Meas., 2020

An Ultrafast Multibit/Stage Pipelined ADC Testing and Calibration Method.
IEEE Trans. Instrum. Meas., 2020

A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier.
IEEE Trans. Circuits Syst., 2020

Three-Junction Bandgap Circuit with Sub 1 ppm/°C Temperature Coefficient.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
A Precision Bandgap Voltage Reference Using Curvature Elimination Technique.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Nonlinear Device Conversion.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Bandgap Voltage VGO Extraction with Two-Temperature Trimming for Designing Sub-ppm/°C Voltage References.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-in Self-Test.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Transparent side channel trigger mechanism on analog circuits with PAAST hardware Trojans.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A High Constancy Rail-to-rail Level Shift Generator for SEIR-based BIST circuit for ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Technique for generating timing skew resistant time-interleaved signals.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An on-chip ADC BIST solution and the BIST enabled calibration scheme.
Proceedings of the IEEE International Test Conference, 2017

2015
A hardware Trojan embedded in the Inverse Widlar reference generator.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A calibration technique for SAR analog-to-digital converter based on INL testing with quantization bits and redundant bit.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Direct temperature to digital converters with low supply sensitivity for power/thermal management.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A programmable temperature trigger circuit.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Auto-identification of positive feedback loops in multi-state vulnerable circuits.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

Challenges and opportunities for determining presence of multiple equilibrium points with circuit simulators.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A CMOS supply-insensitive with 13ppm/°C temperature coefficient current reference.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Welcome to MWSCAS 2014.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Comparison of MOSFET mismatch models with random physical and random model variables.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Effects of non-ideal characteristics of substrate BJT on bandgap reference circuits.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Identification and break of positive feedback loops in Trojan States Vulnerable Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Low-Distortion Sine Wave Generation Using a Novel Harmonic Cancellation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Effectiveness of circuit-level continuation methods for Trojan State Elimination verification.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A low-power supply-insensitive temperature sensor in 90nm CMOS process.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A CMOS on-chip temperature sensor with -0.21°C 0.17 °C inaccuracy from -20 °C to 100 °C.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Practical methods for verifying removal of Trojan stable operating points.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

High resolution ADC spectral test with known impure source and non-coherent sampling.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Reliability degradation with electrical, thermal and thermal gradient stress in interconnects.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
On Chip Signal Generators for Low Overhead ADC BIST.
J. Electron. Test., 2012

Performance verification of start-up circuits in reference generators.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A method for accurate full spectrum testing without requiring coherency.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Reliability modeling of metal interconnects with time-dependent electrical and thermal stress.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A compact low-power supply-insensitive CMOS current reference.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Sinusoidal signal generation for production testing and BIST applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A low cost method for testing offset and gain error for ADC BIST.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Linear vt-based temperature sensors with low process sensitivity and improved power supply headroom.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Linearity testing of ADCs using low linearity stimulus and Kalman filtering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Detailed analyses in prediction of capacitive-mismatch-induced offset in dynamic comparators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Phase control of triangular stimulus generator for ADC BIST.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
High-Resolution ADC Linearity Testing Using a Fully Digital-Compatible BIST Strategy.
IEEE Trans. Instrum. Meas., 2009

Code-Density Test of Analog-to-Digital Converters Using Single Low-Linearity Stimulus Signal.
IEEE Trans. Instrum. Meas., 2009

Analyses of Static and Dynamic Random Offset Voltages in Dynamic Comparators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Optimal Area and Impedance Allocation for Dual-string DACs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Cost Effective Signal Generators for ADC BIST.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Signal generators for cost effective BIST of ADCs.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
Testing of Precision DAC Using Low-Resolution ADC With Wobbling.
IEEE Trans. Instrum. Meas., 2008

System identification -based reduced-code testing for pipeline ADCs' linearity test.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Adjustable hysteresis CMOS Schmitt triggers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A simple and accurate method to predict offset voltage in dynamic comparators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On-chip at-speed linearity testing of high-resolution high-speed DACs using DDEM ADCs with dithering.
Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008

An inexpensive microelectronic environmental test chamber.
Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008

2007
SEIR Linearity Testing of Precision A/D Converters in Nonstationary Environments With Center-Symmetric Interleaving.
IEEE Trans. Instrum. Meas., 2007

Testing High-Resolution ADCs With Low-Resolution/Accuracy Deterministic Dynamic Element Matched DACs.
IEEE Trans. Instrum. Meas., 2007

Robust High-Gain Amplifier Design Using Dynamical Systems and Bifurcation Theory With Digital Postprocessing Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A fully digital-compatible BIST strategy for ADC linearity testing.
Proceedings of the 2007 IEEE International Test Conference, 2007

Deterministic DEM DAC Performance Analysis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Linear Current Division Principles.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A deterministic dynamic element matching approach for testing high-resolution ADCs with low-accuracy excitations.
IEEE Trans. Instrum. Meas., 2006

Yield enhancement with optimal area allocation for ratio-critical analog circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Testing of Precision DACs Using Low-Resolution ADCs with Dithering.
Proceedings of the 2006 IEEE International Test Conference, 2006

Linearity Test of Analog-to-Digital Converters Using Kalman Filtering.
Proceedings of the 2006 IEEE International Test Conference, 2006

Characterization of a current-mode bandgap circuit structure for high-precision reference applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Linearity test for high resolution DACs using low-accuracy DDEM flash ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Minimization of total area in integrated active RC filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Dynamic calibration of current-steering DAC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Unit resistor characterization for matching-critical circuit design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A self-calibrated bandgap voltage reference with 0.5 ppm/°C temperature coefficient.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Explicit characterization of bandgap references.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
Accurate testing of analog-to-digital converters using low linearity signals with stimulus error identification and removal.
IEEE Trans. Instrum. Meas., 2005

A 16-bit resistor string DAC with full-calibration at final test.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

High-performance ADC linearity test using low-precision signals in non-stationary environments.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Pipeline ADC linearity testing with dramatically reduced data capture time.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A two-step DDEM ADC for accurate and cost-effective DAC testing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Fast-switching adaptive bandwidth frequency synthesizer using a loop filter with switched zero-resistor array.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A segmented thermometer coded DAC with deterministic dynamic element matching for high resolution ADC test.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A test strategy for time-to-digital converters using dynamic element matching and dithering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

kT/C constrained optimization of power in pipeline ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Power dependence of feedback amplifiers on opamp architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A digital self-calibration algorithm for ADCs based on histogram test using low-linearity input signals.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An N<sup>th</sup> order central symmetrical layout pattern for nonlinear gradients cancellation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An adaptive, truly background calibration method for high speed pipeline ADC design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A Computationally Efficient Method for Accurate Spectral Testing without Requiring Coherent Sampling.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Accurate testing of ADC's spectral performance using imprecise sinusoidal excitations.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

The SRE/SRM approach for spectral testing of AMS circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Parameter optimization of deterministic dynamic element matching DACs for accurate and cost-effective ADC testing.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Testing high resolution ADCs using deterministic dynamic element matching.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Fast implementation of a linearity test approach for high-resolution ADCs using non-linear ramp signals.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

An SoC compatible linearity test approach for precision ADCs using easy-to-generate sinusoidal stimuli.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimation.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

N<sup>TH</sup> order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradient.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Robust design of high gain amplifiers using dynamical systems and bifurcation theory.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Optimum area allocation for resistors and capacitors in continuous-time monolithic filters.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
BIST and production testing of ADCs using imprecise stimulus.
ACM Trans. Design Autom. Electr. Syst., 2003

A 1.5-V 14-bit 100-MS/s self-calibrated DAC.
IEEE J. Solid State Circuits, 2003

Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

1-D and 2-D switching strategies achieving near optimal INL for thermometer-coded current steering DACs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Inflection point correction for voltage references.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 40 GHz modified-Colpitts voltage controlled oscillator with increased tuning range.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A deterministic dynamic element matching approach to ADC testing.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A low-voltage compatible two-stage amplifier with ≥120 dB gain in standard digital CMOS.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

High-frequency 750mV operational amplifier standard bulk CMOS process.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

A 9b 165MS/s 1.8V pipelined ADC with all digital transistors amplifier.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
A curvature compensation technique for bandgap voltage references using adaptive reference temperature.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Transient bit error rate analysis of data recovery systems using jitter models.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Resistors layout for enhancing yield of R-2R DACs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Formulation of INL and DNL yield estimation in current-steering D/A converters.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

All digital transistor high gain operational amplifier using positive feedback technique.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A high gain CMOS operational amplifier with negative conductance gain enhancement.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancement.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A 2.5 Gbit/s CMOS PLL for data/clock recovery without frequency divider.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Prototype implementation of a WWW based analog circuit design tool.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

MOSGRAD-a tool for simulating the effects of systematic and random channel parameter variations.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Modeling of random channel parameter variations in MOS transistors.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Current mirror circuit with accurate mirror gain for low beta transistors.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A high gain strategy with positive-feedback gain enhancement technique.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Gain and bandwidth boosting techniques for high-speed operational amplifiers.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Gradient sensitivity reduction in current mirrors with non-rectangular layout structures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A new multipath amplifier design technique for enhancing gain without sacrificing bandwidth.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

An asynchronous data recovery/retransmission technique with foreground DLL calibration.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A 2 GHz VCO with process and temperature compensation.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1994
An automatic offset compensation scheme with ping-pong control for CMOS operational amplifiers.
IEEE J. Solid State Circuits, May, 1994

An Accurate and Matching-Free Threshold Voltage Extraction Scheme for MOS Transistors.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

MOS Active Attenuators for Analog ICs and their Applications to FInite Gain Amplifiers.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Very Low Voltage Operational Amplifiers Using Floating Gate MOS Transistor.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Digital correction for improved spectral response in signal generation systems.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


  Loading...