Alessandro Barenghi

Affiliations:
  • Polytechnic University of Milan, Italy


According to our database1, Alessandro Barenghi authored at least 90 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

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Online presence:

On csauthors.net:

Bibliography

2021
LESS-FM: Fine-tuning Signatures from a Code-based Cryptographic Group Action.
IACR Cryptol. ePrint Arch., 2021

Metis: An Integrated Morphing Engine CPU to Protect Against Side Channel Attacks.
IEEE Access, 2021

A Quantum Circuit to Speed-Up the Cryptanalysis of Code-Based Cryptosystems.
Proceedings of the Security and Privacy in Communication Networks, 2021

Improving Work Life Conditions via Portable Knowledge-Driven Recommender System (Discussion Paper).
Proceedings of the 29th Italian Symposium on Advanced Database Systems, 2021

LESS-FM: Fine-Tuning Signatures from the Code Equivalence Problem.
Proceedings of the Post-Quantum Cryptography - 12th International Workshop, 2021

2020
Scramble Suit: A Profile Differentiation Countermeasure to Prevent Template Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Compiler-Based Techniques to Secure Cryptographic Embedded Software Against Side-Channel Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Plaintext Recovery Attacks against Linearly Decryptable Fully Homomorphic Encryption Schemes.
IACR Cryptol. ePrint Arch., 2020

Decision Support Systems to Promote Health and Well-Being of People During Their Working Age: The Case of the WorkingAge EU Project.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

Analysis of In-Place Randomized Bit-Flipping Decoders for the Design of LDPC and MDPC Code-Based Cryptosystems.
Proceedings of the E-Business and Telecommunications, 2020

A Failure Rate Model of Bit-flipping Decoders for QC-LDPC and QC-MDPC Code-based Cryptosystems.
Proceedings of the 17th International Joint Conference on e-Business and Telecommunications, 2020

Integrating Side Channel Security in the FPGA Hardware Design Flow.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2020

A comprehensive analysis of constant-time polynomial inversion for post-quantum cryptosystems.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

Constant weight strings in constant time: a building block for code-based post-quantum cryptosystems.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

Efficient Oblivious Substring Search via Architectural Support.
Proceedings of the ACSAC '20: Annual Computer Security Applications Conference, 2020

2019
A Code-specific Conservative Model for the Failure Rate of Bit-flipping Decoding of LDPC Codes with Cryptographic Applications.
IACR Cryptol. ePrint Arch., 2019

A Finite Regime Analysis of Information Set Decoding Algorithms.
Algorithms, 2019

Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A secure and authenticated host-to-memory communication interface.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

LEDAcrypt: QC-LDPC Code-Based Cryptosystems with Bounded Decryption Failure Rate.
Proceedings of the Code-Based Cryptography - 7th International Workshop, 2019

Privacy preserving substring search protocol with polylogarithmic communication cost.
Proceedings of the 35th Annual Computer Security Applications Conference, 2019

2018
A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture.
ACM Trans. Design Autom. Electr. Syst., 2018

Reactive side-channel countermeasures: Applicability and quantitative security evaluation.
Microprocess. Microsystems, 2018

Systematic parsing of X.509: Eradicating security issues with a parse tree.
J. Comput. Secur., 2018

Design and Implementation of a Digital Signature Scheme Based on Low-density Generator Matrix Codes.
CoRR, 2018

LEDAkem: A Post-quantum Key Encapsulation Mechanism Based on QC-LDPC Codes.
Proceedings of the Post-Quantum Cryptography - 9th International Conference, 2018

Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks.
Proceedings of the 3rd IEEE International Verification and Security Workshop, 2018

OpenCL HLS Based Design of FPGA Accelerators for Cryptographic Primitives.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

Comparison-Based Attacks Against Noise-Free Fully Homomorphic Encryption Schemes.
Proceedings of the Information and Communications Security - 20th International Conference, 2018

Side-channel security of superscalar CPUs: evaluating the impact of micro-architectural features.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Microprocess. Microsystems, 2017

An Enhanced Dataflow Analysis to Automatically Tailor Side Channel Attack Countermeasures to Software Block Ciphers.
Proceedings of the First Italian Conference on Cybersecurity (ITASEC17), 2017

A Security Audit of the OpenPGP Format.
Proceedings of the 14th International Symposium on Pervasive Systems, 2017

2016
A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure.
ACM J. Emerg. Technol. Comput. Syst., 2016

A privacy-preserving encrypted OSN with stateless server interaction: The Snake design.
Comput. Secur., 2016

Safe cooperative CPS: A V2I traffic management scenario in the SafeCOP project.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

A Note on Fault Attacks Against Deterministic Signature Schemes.
Proceedings of the Advances in Information and Computer Security, 2016

Encasing block ciphers to foil key recovery attempts via side channel.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

V2I Cooperation for Traffic Management with SafeCop.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Automated instantiation of side-channel attacks countermeasures for software cipher implementations.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

ShieldFS: a self-healing, ransomware-aware filesystem.
Proceedings of the 32nd Annual Conference on Computer Security Applications, 2016

2015
The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Parallel parsing made practical.
Sci. Comput. Program., 2015

Trace-based schedulability analysis to enhance passive side-channel attack resilience of embedded software.
Inf. Process. Lett., 2015

OpenCL performance portability for general-purpose computation on graphics processor units: an exploration on cryptographic primitives.
Concurr. Comput. Pract. Exp., 2015

Cyber-security analysis and evaluation for smart home management solutions.
Proceedings of the International Carnahan Conference on Security Technology, 2015

Challenging the Trustworthiness of PGP: Is the Web-of-Trust Tear-Proof?
Proceedings of the Computer Security - ESORICS 2015, 2015

Information leakage chaff: feeding red herrings to side channel attackers.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks.
IEEE Trans. Emerg. Top. Comput., 2014

Design space extension for secure implementation of block ciphers.
IET Comput. Digit. Tech., 2014

Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks.
IACR Cryptol. ePrint Arch., 2014

Differential Fault Analysis for Block Ciphers: an Automated Conservative Analysis.
Proceedings of the 7th International Conference on Security of Information and Networks, 2014

On the Security of Partially Masked Software Implementations.
Proceedings of the SECRYPT 2014, 2014

Security challenges in building automation and SCADA.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Securing software cryptographic primitives for embedded systems against side channel attacks.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Towards Transparently Tackling Functionality and Performance Issues across Different OpenCL Platforms.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Snake: An End-to-End Encrypted Online Social Network.
Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

The PAPAGENO Parallel-Parser Generator.
Proceedings of the Compiler Construction - 23rd International Conference, 2014

2013
A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA.
J. Syst. Softw., 2013

Parallel parsing of operator precedence grammars.
Inf. Process. Lett., 2013

Secure and efficient design of software block cipher implementations on microcontrollers.
Int. J. Grid Util. Comput., 2013

Enhancing Passive Side-Channel Attack Resilience through Schedulability Analysis of Data-Dependency Graphs.
Proceedings of the Network and System Security - 7th International Conference, 2013

Security Analysis of Building Automation Networks - Threat Model and Viable Mitigation Techniques.
Proceedings of the Secure IT Systems - 18th Nordic Conference, 2013

Drop-In Control Flow Hijacking Prevention through Dynamic Library Interception.
Proceedings of the Tenth International Conference on Information Technology: New Generations, 2013

Compiler-based side channel vulnerability analysis and optimized countermeasures application.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Fault Attacks on Stream Ciphers.
Proceedings of the Fault Analysis in Cryptography, 2012

Injection Technologies for Fault Attacks on Microprocessors.
Proceedings of the Fault Analysis in Cryptography, 2012

Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures.
Proc. IEEE, 2012

PAPAGENO: A Parallel Parser Generator for Operator Precedence Grammars.
Proceedings of the Software Language Engineering, 5th International Conference, 2012

Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012

A code morphing methodology to automate power analysis countermeasures.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KeeLoq Exhaustive Search Attacks.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2011
On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks - Extracting Keys from Xilinx Virtex-II FPGAs.
IACR Cryptol. ePrint Arch., 2011

Information Leakage Discovery Techniques to Enhance Secure Chip Design.
Proceedings of the Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication, 2011

Fault attack to the elliptic curve digital signature algorithm with multiple bit faults.
Proceedings of the 4th International Conference on Security of Information and Networks, 2011

Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation.
Proceedings of the RFID. Security and Privacy - 7th International Workshop, 2011

A novel fault attack against ECDSA.
Proceedings of the HOST 2011, 2011

On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Security and Privacy in Smart Grid Infrastructures.
Proceedings of the 2011 Database and Expert Systems Applications, 2011

2010
Low Voltage Fault Attacks to AES and RSA on General Purpose Processors.
IACR Cryptol. ePrint Arch., 2010

Improving first order differential power attacks through digital signal processing.
Proceedings of the 3rd International Conference on Security of Information and Networks, 2010

Record Setting Software Implementation of DES Using CUDA.
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010

Low Voltage Fault Attacks to AES.
Proceedings of the HOST 2010, 2010

Countermeasures against fault attacks on software implemented AES: effectiveness and cost.
Proceedings of the 5th Workshop on Embedded Systems Security, 2010

Fault attack on AES with single-bit induced faults.
Proceedings of the Sixth International Conference on Information Assurance and Security, 2010

2009
Fast Disk Encryption through GPGPU Acceleration.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

Design of a parallel AES for graphics hardware using the CUDA framework.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Low Voltage Fault Attacks on the RSA Cryptosystem.
Proceedings of the Sixth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2009

2008
A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp.
Proceedings of the Fifth International Conference on Information Technology: New Generations (ITNG 2008), 2008


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