Tom Maffitt

Affiliations:
  • IBM Systems and Technology Group, Essex Junction, VT, USA


According to our database1, Tom Maffitt authored at least 6 papers between 1995 and 2017.

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Bibliography

2017
12.4 1.4Gsearch/s 2Mb/mm<sup>2</sup> TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015
A fully-functional 90nm 8Mb STT MRAM demonstrator featuring trimmed, reference cell-based sensing.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2013
A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2006
Design considerations for MRAM.
IBM J. Res. Dev., 2006

2005
A 16-Mb MRAM featuring bootstrapped write drivers.
IEEE J. Solid State Circuits, 2005

1995
Multipurpose DRAM architecture for optimal power, performance, and product flexibility.
IBM J. Res. Dev., 1995


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