Thomas Mesquida

Orcid: 0000-0002-2572-5353

According to our database1, Thomas Mesquida authored at least 13 papers between 2016 and 2023.

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Bibliography

2023
Are SNNs Really More Energy-Efficient Than ANNs? an In-Depth Hardware-Aware Study.
IEEE Trans. Emerg. Top. Comput. Intell., June, 2023

Scaling-up Memristor Monte Carlo with magnetic domain-wall physics.
CoRR, 2023

Improving the Robustness of Neural Networks to Noisy Multi-Level Non-Volatile Memory-based Synapses.
Proceedings of the International Joint Conference on Neural Networks, 2023

Leveraging Sparsity with Spiking Recurrent Neural Networks for Energy-Efficient Keyword Spotting.
Proceedings of the IEEE International Conference on Acoustics, 2023

The CNN vs. SNN Event-camera Dichotomy and Perspectives For Event-Graph Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

HUGNet: Hemi-Spherical Update Graph Neural Network applied to low-latency event-based optical flow.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

G2N2: Lightweight Event Stream Classification with GRU Graph Neural Networks.
Proceedings of the 34th British Machine Vision Conference 2023, 2023

2022
Investigating Current-Based and Gating Approaches for Accurate and Energy-Efficient Spiking Recurrent Neural Networks.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2022, 2022

SpikiLi: A Spiking Simulation of LiDAR based Real-time Object Detection for Autonomous Driving.
Proceedings of the 8th International Conference on Event-Based Control, 2022

2020
Fully-Integrated Spiking Neural Network Using SiOx-Based RRAM as Synaptic Device.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
Spiking Neural Networks Hardware Implementations and Challenges: A Survey.
ACM J. Emerg. Technol. Comput. Syst., 2019

2017
Architecture exploration of a fixed point computation unit using precise timing spiking neurons.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

2016
MCAPI-compliant Hardware Buffer Manager mechanism to support communication in multi-core architectures.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016


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