Thiago R. da Rosa

According to our database1, Thiago R. da Rosa authored at least 11 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
A 0.021mm<sup>2</sup> PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2016
MCAPI-compliant Hardware Buffer Manager mechanism to support communication in multi-core architectures.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
A Co-design Approach for Hardware Optimizations in Multicore Architectures Using MCAPI.
Proceedings of the Ninth International Workshop on Interconnection Network Architectures: On-Chip, 2015

2014
Fast energy evaluation of embedded applications for many-core systems.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

2012
Power consumption reduction in MPSoCs through DFS.
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012

2011
A self-adaptable distributed DFS scheme for NoC-based MPSoCs.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

2010
Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

A message-level monitoring protocol for QoS flows in NoCs.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

2009
A high abstraction, high accuracy power estimation model for networks-on-chip.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Increasing NoC power estimation accuracy through a rate-based model.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009

2008
NoC Power Estimation at the RTL Abstraction Level.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008


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