Tom J. Kazmierski
Orcid: 0000-0003-2413-361X
According to our database1,
Tom J. Kazmierski
authored at least 67 papers
between 1991 and 2020.
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Bibliography
2020
Modified Compressed Sparse Row Format for Accelerated FPGA-Based Sparse Matrix Multiplication.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the Forum for Specification and Design Languages, 2020
High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase Clocked Flip-Flop in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019
An Efficient Numerical Solution Technique for VLSI Interconnect Equations on Many-Core Processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Simulation Acceleration of Image Filtering on CMOS Vision Chips Using Many-Core Processors.
Proceedings of the 2019 Forum for Specification and Design Languages, 2019
2018
Proceedings of the 2018 Forum on Specification & Design Languages, 2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
J. Electron. Test., 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
Proceedings of the 26th IEEE International Symposium on Industrial Electronics, 2017
Proceedings of the 22nd IEEE European Test Symposium, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
2016
Susceptible workload driven selective fault tolerance using a probabilistic fault model.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Using event-B and Modelica to evaluate thermal management strategies in many core systems.
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
An ultra-low-power variable-accuracy bit-serial FFT butterfly processing element for IoT sensors.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2013
A floating gate graphene FET complementary inverter with symmetrical transfer characteristics.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 Forum on specification and Design Languages, 2013
DoE-based performance optimization of energy management in sensor nodes powered by tunable energy-harvesters.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
An Explicit Linearized State-Space Technique for Accelerated Simulation of Electromagnetic Vibration Energy Harvesters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012
Response-surface-based design space exploration and optimisation of wireless sensor nodes with tunable energy harvesters.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
Proceedings of the 2011 Forum on Specification & Design Languages, 2011
An extension to SystemC-A to support mixed-technology systems with distributed components.
Proceedings of the Design, Automation and Test in Europe, 2011
Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Bandwidth selective filter for the pre-excision of narrowband interference in broadband beamformers.
IET Commun., 2010
Genetic-based automated synthesis and optimization of MEMS accelerometers with sigma-delta control.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Genetic-Based High-Level Synthesis of Sigma-Delta Modulator in SystemC-A.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
SystemC-A Modelling of Mixed-Technology Systems with Distributed Behaviour.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
2009
VHDL-AMS Based Genetic Optimization of Mixed-Physical-Domain Systems in Automotive Applications.
Simul., 2009
Analysis of sense finger dynamics for accurate ΣΔ MEMS accelerometer modelling in VHDL-AMS.
Proceedings of the Forum on specification and Design Languages, 2009
Proceedings of the Forum on specification and Design Languages, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Proceedings of the Languages for Embedded Systems and their Applications, 2008
VHDL-AMS Implementation of a Numerical Ballistic CNT Model for Logic Circuit Simulation.
Proceedings of the Forum on specification and Design Languages, 2008
Integrated approach to energy harvester mixed technology modelling and performance optimisation.
Proceedings of the Design, Automation and Test in Europe, 2008
Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density.
Proceedings of the Design, Automation and Test in Europe, 2008
Automated Performance Optimisation and Layout Synthesis of MEMS Accelerometer with Sigma-Delta Force-Feedback Control Loop.
Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop, 2008
2007
Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007
Proceedings of the Forum on specification and Design Languages, 2007
2006
Timeless Discretization of Magnetization Slope in the Modeling of Ferromagnetic Hysteresis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the Forum on specification and Design Languages, 2006
HDL models of ferromagnetic core hysteresis using timeless discretisation of the magnetic slope.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
VHDL-AMS modeling of an automotive vibration isolation seating system.
Proceedings of the Third IASTED International Conference on Circuits, 2005
Proceedings of the Forum on specification and Design Languages, 2005
Proceedings of the Forum on specification and Design Languages, 2005
2004
Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
SEAMS - a SystemC environment with analog and mixed-signal extensions.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A novel approach to mixed-domain behavioral modeling of ferromagnetic hysteresis in VHDL-AMS.
Proceedings of the Forum on specification and Design Languages, 2004
Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS.
Proceedings of the 2004 Design, 2004
2003
Synchronization of analogue and digital solvers in mixed-signal simulation on a SystemC platform.
Proceedings of the Forum on specification and Design Languages, 2003
SystemC - a powerful system-level modelling platform for digital and mixed-signal hardware/software co-design.
Proceedings of the Forum on specification and Design Languages, 2003
FIST - a VHDL-AMS based architectural synthesis strategy for integrated high-frequency analogue filters.
Proceedings of the Forum on specification and Design Languages, 2003
Proceedings of the 2003 Design, 2003
2002
Automated high level synthesis of hardware building blocks present in ART-based neural networks, from VHDL-AMS descriptions.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 Design, 2002
1998
Proceedings of the Object-Oriented Technology, ECOOP'98 Workshop Reader, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
1992
1991
A General Purpose Network Solving System.
Proceedings of the VLSI 91, 1991