Utkarsh Saxena
Orcid: 0009-0007-0042-2413
According to our database1,
Utkarsh Saxena
authored at least 15 papers
between 2018 and 2025.
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Bibliography
2025
HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accelerator for Deep Learning Workloads.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2024
Hardware/Software Co-Design With ADC-Less In-Memory Computing Hardware for Spiking Neural Networks.
IEEE Trans. Emerg. Top. Comput., 2024
CoRR, 2024
Proceedings of the NeurIPS Efficient Natural Language and Speech Processing Workshop, 2024
Proceedings of the Findings of the Association for Computational Linguistics: EMNLP 2024, 2024
2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the 34th British Machine Vision Conference 2023, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
IEEE Des. Test, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
Int. J. Electron. Secur. Digit. Forensics, 2020
Prediction of Syncope based on Physiological Data Analysis using Decision Tree Algorithm.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020
2019
On-chip Learning In A Conventional Silicon MOSFET Based Analog Hardware Neural Network.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
2018
CoRR, 2018