Vishal Khandelwal

According to our database, Vishal Khandelwal authored at least 29 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning.

Yi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Driving Early Physical Synthesis Exploration through End-of-Flow Total Power Prediction.

Yi-Chen Lu, Wei-Ting Chan, Vishal Khandelwal, Sung Kyu Lim

Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022

Machine-Learning Enabled PPA Closure for Next-Generation Designs.

Vishal Khandelwal

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2021

Machine Learning-Enabled High-Frequency Low-Power Digital Design Implementation At Advanced Process Nodes.

Siddhartha Nath, Vishal Khandelwal

Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

Doomed Run Prediction in Physical Design by Exploiting Sequential Flow and Graph Learning.

Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning.

Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Machine-Learning Enabled Next-Generation Physical Design - An EDA Perspective.

Vishal Khandelwal

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

2009

On improving optimization effectiveness in interconnect-driven physical synthesis.

Prashant Saxena, Vishal Khandelwal, Changge Qiao, Pei-Hsin Ho, J.-C. Lin, Mahesh A. Iyer

Proceedings of the 2009 International Symposium on Physical Design, 2009

2008

Basic Algorithmic Techniques.

Vishal Khandelwal, Ankur Srivastava

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Variability-Driven Formulation for Simultaneous Gate Sizing and Postsilicon Tunability Allocation.

Vishal Khandelwal, Ankur Srivastava

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

Variability-Aware VLSI Design Automation For Nanoscale Technologies.

Vishal Khandelwal

PhD thesis, 2007

A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlations.

Vishal Khandelwal, Ankur Srivastava

IEEE Trans. Very Large Scale Integr. Syst., 2007

Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors.

Vishal Khandelwal, Ankur Srivastava

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Active mode leakage reduction using fine-grained forward body biasing strategy.

Vishal Khandelwal, Ankur Srivastava

Integr., 2007

Efficient and Accurate Statistical Timing Analysis for Non-Linear Non-Gaussian Variability With Incremental Attributes.

Ashish Dobhal, Vishal Khandelwal, Ankur Srivastava

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence.

Ashish Dobhal, Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Variability-driven formulation for simultaneous gate sizing and post-silicon tunability allocation.

Vishal Khandelwal, Ankur Srivastava

Proceedings of the 2007 International Symposium on Physical Design, 2007

Statistical timing analysis using Kernel smoothing.

Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak

Proceedings of the 25th International Conference on Computer Design, 2007

Monte-Carlo driven stochastic optimization framework for handling fabrication variability.

Vishal Khandelwal, Ankur Srivastava

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

A statistical methodology for wire-length prediction.

Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Probabilistic Evaluation of Solutions in Variability-Driven Optimization.

Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

Simultaneous V_t selection and assignment for leakage optimization.

Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava

IEEE Trans. Very Large Scale Integr. Syst., 2005

A general framework for accurate statistical timing analysis considering correlations.

Vishal Khandelwal, Ankur Srivastava

Proceedings of the 42nd Design Automation Conference, 2005

2004

Empirical models for net-length probability distribution and applications.

Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava

IEEE Trans. Very Large Scale Integr. Syst., 2004

Wire-length prediction using statistical techniques.

Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Efficient statistical timing analysis through error budgeting.

Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Variability inspired implementation selection problem.

Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

High level techniques for power-grid noise immunity.

Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

A Probabilistic Approach to Buffer Insertion.

Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati, Ankur Srivastava

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003