Wai-Chi Fang

According to our database1, Wai-Chi Fang
  • authored at least 80 papers between 1990 and 2017.
  • has a "Dijkstra number"2 of five.

Awards

IEEE Fellow

IEEE Fellow 2003, "For contributions to VLSI systems using neural-based methods.".

Timeline

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Bibliography

2017
A reliable brain-computer interface based on SSVEP using online recursive independent component analysis.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

2016
A Wearable Channel Selection-Based Brain-Computer Interface for Motor Imagery Detection.
Sensors, 2016

A wireless photoplethysmography signal processing system for long-term monitoring.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Development of a reliable SSVEP-based BCI mobile dialing system.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

2015
Guest Editorial - Special Issue on Selected Papers From IEEE BioCAS 2014.
IEEE Trans. Biomed. Circuits and Systems, 2015

Wireless Monitoring System for Oral-Feeding Evaluation of Preterm Infants.
IEEE Trans. Biomed. Circuits and Systems, 2015

Guest Editorial: Multimedia Applications for Smart device and Equipment.
Multimedia Tools Appl., 2015

An effective photoplethysmography signal processing system based on EEMD method.
Proceedings of the VLSI Design, Automation and Test, 2015

An advanced patient bedside monitoring system design based on WBAN and telemedicine technologies.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

An effective three way PPG acquiring and signal processing system by using square wave modulation.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

Real-time obstructive sleep apnea detection from frequency analysis of EDR and HRV using Lomb Periodogram.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014
An effective arterial blood pressure signal processing system based on EEMD method.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

A highly integrated biomedical multiprocessor SoC design for a wireless bedside monitoring system.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A reliable brain computer interface implemented on an FPGA for a mobile dialing system.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A wireless near-infrared imaging system design for breast tumor detection.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

A non-linear iterative method for multi-layer DOT sub-surface imaging system.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

An efficient ASIC implementation of 16-channel on-line recursive ICA processor for real-time EEG system.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

2013
Design of heart rate variability processor for portable 3-lead ECG monitoring system-on-chip.
Expert Syst. Appl., 2013

An online recursive ICA based real-time multichannel EEG system on chip design with automatic eye blink artifact rejection.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

A real-time processing flow for ICA based EEG acquisition system with eye blink artifact elimination.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

A VLSI design of singular value decomposition processor used in real-time ICA computation for multi-channel EEG system.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An ICA-based automatic eye blink artifact eliminator for real-time multi-channel EEG applications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

A novel readout chip with extendability for multi-channel EEG measurement.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

An efficient VLSI implementation of on-line recursive ICA processor for real-time multi-channel EEG signal separation.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

A pipeline VLSI design of fast singular value decomposition processor for real-time EEG system based on on-line recursive independent component analysis.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
Ubiquitous Sensor Networks and Its Application.
IJDSN, 2012

Secure medical information exchange with reversible data hiding.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Real-time obstructive sleep apnea detection based on ECG derived respiration signal.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A SoC design for portable 2-dimension oximeter image system.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Portable SoC design for CW diffusion optical tomography.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

A brain-computer interface with real-time independent component analysis for biomedical applications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

An EEG-based brain - computer interface with real-time artifact removal using independent component analysis.
Proceedings of the IEEE Second International Conference on Consumer Electronics - Berlin, 2012

2011
Reversible data hiding with histogram-based difference expansion for QR code applications.
IEEE Trans. Consumer Electronics, 2011

Mixed bio-signal lossless data compressor for portable brain-heart monitoring systems.
IEEE Trans. Consumer Electronics, 2011

Authenticity Preservation with Histogram-Based Reversible Data Hiding and Quadtree Concepts.
Sensors, 2011

A highly-integrated biomedical multiprocessor system for portable brain-heart monitoring.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A low power independent component analysis processor in 90nm CMOS technology for portable EEG signal processing systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

An innovative interface design with smart phone for interactive computer game applications.
Proceedings of the 2011 IEEE International Games Innovation Conference, 2011

Real-time FPGA based 3D camera resectioning.
Proceedings of the 2011 IEEE International Games Innovation Conference, 2011

2010
Techniques and applications of intelligent multimedia data hiding.
Telecommunication Systems, 2010

Metadata-based image watermarking for copyright protection.
Simulation Modelling Practice and Theory, 2010

Context-Aware Middleware and Intelligent Agents for Smart Environments.
IEEE Intelligent Systems, 2010

A Data Detection Scheme for Single-Carrier Block Transmission Using Sphere Decoding Algorithm.
Proceedings of the 71st IEEE Vehicular Technology Conference, 2010

Implementation of a hardware-efficient EEG processor for brain monitoring systems.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

An innovative breathing game applied with textile sensors.
Proceedings of the 2010 International IEEE Consumer Electronics Society's Games Innovations Conference, 2010

A Time-Frequency HRV Processor Using Windowed Lomb Periodogram.
Proceedings of the Database Theory and Application, Bio-Science and Bio-Technology, 2010

A Hardware Design for Portable Continuous Wave Diffuse Optical Tomography.
Proceedings of the Database Theory and Application, Bio-Science and Bio-Technology, 2010

Histogram-Based Reversible Data Hiding with Quadtree Concepts.
Proceedings of the Security Technology, Disaster Recovery and Business Continuity, 2010

Portable Brain-Heart Monitoring System.
Proceedings of the Database Theory and Application, Bio-Science and Bio-Technology, 2010

Reversible Data Hiding Using Characteristics of Original Contents.
Proceedings of the 2010 International Conference on Security & Management, 2010

2009
Special section: Grid/distributed computing systems security.
Future Generation Comp. Syst., 2009

Reversible Data Hiding using Histogram-based Difference Expansion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Applications of Reversible Data Hiding Techniques with the Quick Response Codes.
Proceedings of the Security Technology, 2009

2008
Reconfigurable Depth Buffer Compression Design for 3D Graphics System.
Proceedings of the 2008 International Conference on Multimedia and Ubiquitous Engineering (MUE 2008), 2008

Design of multi-mode depth buffer compression for 3D graphics system.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

Towards Improving QoS-Guided Scheduling in Grids.
Proceedings of the Third ChinaGrid Annual Conference, ChinaGrid 2008, Dunhuang, Gansu, 2008

2007
An Introduction to Intelligent Multimedia Data Hiding.
Proceedings of the Intelligent Multimedia Data Hiding: New Directions, 2007

Gigascale System Design of Sensor Networks for Active Volcanoes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Bio-Inspired Microsystem for Robust Genetic Assay Recognition.
Proceedings of the Frontiers in the Convergence of Bioscience and Information Technologies 2007, 2007

2006
Lossless data compression core design for integrated space data and communication system-on-chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Low-Power Radio Design for Wireless Smart Sensor Networks.
Proceedings of the Second International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2006), 2006

VLSI Bio-Inspired Microsystem for Robust Microarrray Image Analysis and Recognition.
Proceedings of the Second International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2006), 2006

System-on-Chip Architecture Design for Intelligent Sensor Networks.
Proceedings of the Second International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2006), 2006

2005
On-board fault-tolerant SAR processor for spaceborne imaging radar systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
On board processor development for NASA's spaceborne imaging radar with VLSI system-on-chip technology.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
VLSI design of turbo decoder for integrated communication system-on-chip applications.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2000
A smart vision system-on-a-chip design based on programmable neural processor integrated with active pixel sensor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Monolithic Microprocessor and RF Transceiver in 0.25-micron FDSOI CMOS.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Novel Design for Testability of a Mixed-Signal VLSI IC.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1997
A Low Power Smart Vision System Based on Active Pixel Sensor Integrated with Programmable Neural Processor.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996
An integrated microspacecraft avionics architecture using 3D multichip module building blocks.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995
VLSI Design of Cellular Neutral Networks with Annealing and Optical Input Capabilities.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Smart-pixel array processors based on optimal cellular neural networks for space sensor applications.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994
VLSI systolic binary tree-searched vector quantizer for image compression.
IEEE Trans. VLSI Syst., 1994

Image compression using self-organization networks.
IEEE Trans. Circuits Syst. Video Techn., 1994

1993
VLSI neuroprocessors for video motion detection.
IEEE Trans. Neural Networks, 1993

1992
A VLSI neural processor for image data compression using self-organization networks.
IEEE Trans. Neural Networks, 1992

Image Compression on a VLSI Neural-Based Vector Quantizer.
Inf. Process. Manage., 1992

1991
A Neural Network Based VLSI Vector Quantizer for Real-Time Image Compression.
Proceedings of the IEEE Data Compression Conference, 1991

1990
Real-time computing of optical flow using adaptive VLSI neuroprocessors.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990


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