# Bing J. Sheu

According to our database

Collaborative distances:

^{1}, Bing J. Sheu authored at least 53 papers between 1987 and 2002.Collaborative distances:

## Timeline

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#### On csauthors.net:

## Bibliography

2002

An efficient parameter extraction method using statistical optimization in S-CMOS deep-submicron/nanometer model.

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Proceedings of the 38th Design Automation Conference, 2001

2000

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

1998

A compact and unified MOS DC current model with highly continuous conductances for low-voltage ICs.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Advances in efficient optical links to enhance desktop multimedia processor systems.

IEEE Trans. Circuits Syst. Video Technol., 1997

IEEE Trans. Circuits Syst. Video Technol., 1997

A CDMA communication detector with robust near-far resistance using paralleled array processors.

IEEE Trans. Circuits Syst. Video Technol., 1997

A Low Power Smart Vision System Based on Active Pixel Sensor Integrated with Programmable Neural Processor.

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996

IEEE Trans. Neural Networks, 1996

VLSI design for real-time signal processing based on biologically realistic neural models.

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

A Compact Neural Network Based CDMA Receiver for Multimedia Wireless Communication.

Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995

VLSI-Compatible Cellular Neural Networks with Optimal Solution Capability for Optimization.

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

VLSI Neural Network Implementation of a Hippocampal Model.

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

VLSI Design of Cellular Neutral Networks with Annealing and Optical Input Capabilities.

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A hippocampal model implementation using VLSI table-look-up and model-based approaches.

Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

A compact VLSI design for recursive neural networks with hardware annealing capability.

Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

Smart-pixel array processors based on optimal cellular neural networks for space sensor applications.

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994

J. VLSI Signal Process., 1994

IEEE Trans. Very Large Scale Integr. Syst., 1994

IEEE Trans. Very Large Scale Integr. Syst., 1994

An adaptive vector quantizer based on the Gold-Washing method for image compression.

IEEE Trans. Circuits Syst. Video Technol., 1994

IEEE Trans. Circuits Syst. Video Technol., 1994

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

J. VLSI Signal Process., 1993

A VLSI neuroprocessor for image restoration using analog computing-based systolic architecture.

J. VLSI Signal Process., 1993

IEEE Trans. Neural Networks, 1993

Paralleled hardware annealing for optimal solutions on electronic neural networks.

IEEE Trans. Neural Networks, 1993

IEEE Trans. Neural Networks, 1993

1992

A VLSI neural processor for image data compression using self-organization networks.

IEEE Trans. Neural Networks, 1992

IEEE Trans. Circuits Syst. Video Technol., 1992

Inf. Process. Manag., 1992

Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

Proceedings of the IEEE Data Compression Conference, 1992

1991

IEEE Trans. Neural Networks, 1991

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

Proceedings of the 1991 International Conference on Acoustics, 1991

Proceedings of the 1991 International Conference on Acoustics, 1991

Proceedings of the IEEE Data Compression Conference, 1991

1990

Proceedings of the IJCNN 1990, 1990

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1988

Device and circuit simulation interface for an integrated VLSI design environment.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Proceedings of International Conference on Neural Networks (ICNN'88), 1988

1987

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987