Wei-Lun Hung

According to our database1, Wei-Lun Hung authored at least 25 papers between 2004 and 2021.

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Bibliography

2021
A systematic review to identify the effects of tea by integrating an intelligence-based hybrid text mining and topic model.
Soft Comput., 2021

The Guardian Slippers: Designing an IoT Device to Enhance Safety for the Elderly in the Nursing Home.
Proceedings of the Advances in Human Factors and Ergonomics in Healthcare and Medical Devices, 2021

2018
Tea in Benefits of Health: A Literature Analysis Using Text Mining and Latent Dirichlet Allocation.
Proceedings of the 2nd International Conference on Medical and Health Informatics, 2018

2017
Compressive Sensing (CS) Assisted Low-Complexity Beamspace Hybrid Precoding for Millimeter-Wave MIMO Systems.
IEEE Trans. Signal Process., 2017

Automatic-Signal Monitors with Multi-object Synchronization.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

2015
Low-complexity hybrid precoding algorithm based on orthogonal beamforming codebook.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

ActiveMonitor: Asynchronous Monitor Framework for Scalability and Multi-Object Synchronization.
Proceedings of the 19th International Conference on Principles of Distributed Systems, 2015

2014
ActiveMonitor: Non-blocking Monitor Executions for Increased Parallelism.
CoRR, 2014

Non-blocking Monitor Executions for Increased Parallelism.
Proceedings of the Distributed Computing - 28th International Symposium, 2014

2013
AutoSynch: an automatic-signal monitor based on predicate tagging.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

2011
Detecting failures in distributed systems with the Falcon spy network.
Proceedings of the 23rd ACM Symposium on Operating Systems Principles 2011, 2011

2010
Total Power Optimization for Combinational Logic Using Genetic Algorithms.
J. Signal Process. Syst., 2010

2009
Interpolating functions from large Boolean relations.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2008
Bi-decomposing large Boolean functions via interpolation and satisfiability solving.
Proceedings of the 45th Design Automation Conference, 2008

2007
Architecting Microprocessor Components in 3D Design Space.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Inductive equivalence checking under retiming and resynthesis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006
Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design.
J. VLSI Signal Process., 2006

Interconnect and Thermal-aware Floorplanning for 3D Microprocessors.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Guaranteeing performance yield in high-level synthesis.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005
An ILP Formulation for Reliability-Oriented High-Level Synthesis.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Reliability-Centric Hardware/Software Co-Design.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Thermal-Aware Floorplanning Using Genetic Algorithms.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Temperature-Aware Voltage Islands Architecting in System-on-Chip Design.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Thermal-Aware Task Allocation and Scheduling for Embedded Systems.
Proceedings of the 2005 Design, 2005

2004
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004


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