Weicheng Liu

According to our database1, Weicheng Liu authored at least 9 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
SLECTS: Slew-Driven Clock Tree Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Low Voltage Clock Tree Synthesis with Local Gate Clusters.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2016
Design Methodology for Voltage-Scaled Clock Distribution Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Exploiting useful skew in gated low voltage clock trees.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Torchless: Asymmetry in a Shared Screen Dungeon Crawler.
Proceedings of the 2016 Annual Symposium on Computer-Human Interaction in Play, 2016

2015
Enhanced level shifter for multi-voltage operation.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A Novel Static D-Flip-Flop Topology for Low Swing Clocking.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2014
An area-efficient LDMOS-SCR ESD protection device for the I/O of power IC application.
Microelectron. Reliab., 2014


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