Yao-Kai Yeh
Orcid: 0009-0005-5540-295X
According to our database1,
Yao-Kai Yeh authored at least 5 papers
between 2010 and 2026.
Collaborative distances:
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Bibliography
2026
A 16nm, 1Mb, 1-to-8b-Configurable 444.21TOPS/W Fully Digital SRAM Compute-in-Memory Macro for Hybrid SNN-CNN Edge Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
30.5 A 16nm 72kb 120.5TFLOPS/W Versatile-Format Dual-Representation Gain-Cell CIM Macro for General Purpose AI Tasks.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
A 22nm 96Mb 50.6-to-90.2TFLOPS/W Non-Linear MLC ReRAM CIM Macro with High-Retention for Mamba/Transformer/CNN.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010