Yu-Sheng Kao
Orcid: 0009-0006-2008-4004
According to our database1,
Yu-Sheng Kao authored at least 4 papers
between 2025 and 2026.
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Bibliography
2026
A Microscaling Multi-Mode Gain-Cell Computing-in-Memory Macro for Advanced AI Edge Device.
IEEE J. Solid State Circuits, January, 2026
A 16nm, 1Mb, 1-to-8b-Configurable 444.21TOPS/W Fully Digital SRAM Compute-in-Memory Macro for Hybrid SNN-CNN Edge Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
30.5 A 16nm 72kb 120.5TFLOPS/W Versatile-Format Dual-Representation Gain-Cell CIM Macro for General Purpose AI Tasks.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2025
14.2 A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025