A 2.38 MCells/mm<sup>2</sup> 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation.

[BibT_eX]

[DOI]

Samuel D. Spetalnick

Muya Chang

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A 73.53TOPS/W 14.74TOPS Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Hybrid Frame and Event-Based Target Tracking.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

Live Demonstration: Hybrid RRAM and SRAM SoC for Fused Frame and Event Target Tracking.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Neuromorphic Swarm on RRAM Compute-in-Memory Processor for Solving QUBO Problem.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

A 40nm 64kb 26.56TOPS/W 2.37Mb/mm<sup>2</sup>RRAM Binary/Compute-in-Memory Macro with 4.23x Improvement in Density and >75% Use of Sensing Dynamic Range.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 40nm 60.64TOPS/W ECC-Capable Compute-in-Memory/Digital 2.25MB/768KB RRAM/SRAM System with Embedded Cortex M3 Microprocessor for Edge Recommendation Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Characterization and Mitigation of IR-Drop in RRAM-based Compute In-Memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Improving compute in-memory ECC reliability with successive correction.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

A Hardware-Friendly Approach Towards Sparse Neural Networks Based on LFSR-Generated Pseudo-Random Sequences.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Merged Logic and Memory Fabrics for Accelerating Machine Learning Workloads.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Automatic Generation of Translators for Packet-Based and Emerging Protocols.

[BibT_eX]

[DOI]

Brian Crafton

Arijit Raychowdhury

Sung Kyu Lim

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Statistical Optimization of Compute In-Memory Performance Under Device Variation.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

Merged Logic and Memory Fabrics for AI Workloads.

[BibT_eX]

[DOI]

Brian Crafton

Samuel Spetalnick

Arijit Raychowdhury

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Hardware-Algorithm Co-Design Enabling Efficient Event-based Object Detection.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020

Counting Cards: Exploiting Weight and Variance Distributions for Robust Compute In-Memory.

[BibT_eX]

[DOI]

Brian Crafton

Samuel Spetalnick

Arijit Raychowdhury

CoRR, 2020

Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Design Trends, 2020

Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics.

[BibT_eX]

[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Hardware-Aware Pruning of DNNs using LFSR-Generated Pseudo-Random Indices.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Direct Feedback Alignment with Sparse Connections for Local Learning.

[BibT_eX]

[DOI]

CoRR, 2019

Local Learning in RRAM Neural Networks with Sparse Direct Feedback Alignment.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Brian Crafton

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